Z8018010PSG Zilog, Z8018010PSG Datasheet - Page 156

IC 10MHZ Z180 CMOS ENH MPU 64DIP

Z8018010PSG

Manufacturer Part Number
Z8018010PSG
Description
IC 10MHZ Z180 CMOS ENH MPU 64DIP
Manufacturer
Zilog
Datasheets

Specifications of Z8018010PSG

Processor Type
Z180
Features
8-Bit, Enhanced Z80 Megacell
Speed
10MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
64-DIP (0.750", 19.05mm)
Processor Series
Z8018xx
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
10 MHz
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
Core Size
8bit
Cpu Speed
10MHz
Digital Ic Case Style
DIP
No. Of Pins
64
Supply Voltage Range
4.5V To 5.5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
8018010
Rohs Compliant
Yes
Clock Frequency
10MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3889
Z8018010PSG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8018010PSG
Manufacturer:
Zilog
Quantity:
40
ASCI to/from DMAC Operation
Operation of the ASCI with the on-chip DMAC channel 0 requires that the
DMAC be correctly configured to use the ASCI flags as DMA request signals.
ASCI and RESET
During RESET, the ASCI status and control registers are initialized as
defined in the individual register descriptions.
Receive and Transmit operations are stopped during RESET. However,
the contents of the transmit and receive data registers (TDR and RDR) are
not changed by RESET.
ASCI Clock
When in external clock input mode, the external clock is directly input to
the sampling rate (¸16/¸64) as depicted in Figure 56.
External Clock
Figure 56.
Internal Clock
fc £ Phi
¸
Phi
40
ASCI Clock
Baud Rate Selection Prescaler
¸
1 to
¸
64
¸
10
Family MPU User Manual
¸
30
Sampling Rate
¸
16
UM005003-0703
¸
64
Z8018x
141

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