Z8018010PSG Zilog, Z8018010PSG Datasheet - Page 180
Z8018010PSG
Manufacturer Part Number
Z8018010PSG
Description
IC 10MHZ Z180 CMOS ENH MPU 64DIP
Manufacturer
Zilog
Specifications of Z8018010PSG
Processor Type
Z180
Features
8-Bit, Enhanced Z80 Megacell
Speed
10MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
64-DIP (0.750", 19.05mm)
Processor Series
Z8018xx
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
10 MHz
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
Core Size
8bit
Cpu Speed
10MHz
Digital Ic Case Style
DIP
No. Of Pins
64
Supply Voltage Range
4.5V To 5.5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
8018010
Rohs Compliant
Yes
Clock Frequency
10MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3889
Z8018010PSG
Z8018010PSG
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8018010PSG
Manufacturer:
Zilog
Quantity:
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1.
*n = 0, 1
PRT Operation Notes
•
•
Secondary Bus Interface
E clock Output Timing
The Z8X180 also has a secondary bus interface that allows it to easily
interface with other peripheral families.
TMDR data is accurately read without stopping down counting by
reading the lower (TMDRnL*) and higher (TMDRnH*) bytes in that
order. Also, TMDR is read or written by stopping the down
counting.
Take care to ensure that a timer reload does not occur during or
between lower (RLDRnL*) and higher (RLDRnH*) byte writes. This
may be guaranteed by system design/timing or by stopping down
counting (with TMDR containing a non-zero value) during the RLDR
updating. Similarly, in applications where TMDR is written at each
TMDR overflow, the system/software design must guarantee that
RLDR can be updated before the next overflow occurs. Otherwise,
time base inaccuracy occurs.
During RESET, the multiplexed A18/TOUT pin reverts to the address
output. By reprogramming the TOC1 and TOC0 bits, the timer output
function for PRT channel 1 is selected. The following paragraph
describes the initial state of the TOUT pin after TOC1 and TOC0 are
programmed to select the PRT channel 1 timer output function.
PRT (channel 1) has not counted down to 0.
If the PRT has not counted down to 0 (timed out), the initial state of
TOUT depends on the programmed value in TOC1 and TOC0.
1
Family MPU User Manual
UM005003-0703
Z8018x
165
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