MC68SEC000AA16 Freescale Semiconductor, MC68SEC000AA16 Datasheet - Page 111

• Manufacturer Part Number: MC68SEC000AA16
• Description: IC MPU 32BIT 16MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68SEC000AA16

• Processor Type: M680x0 32-Bit
• Speed: 16MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 64-QFP
• Processor Series: M680xx
• Core: CPU32
• Maximum Clock Frequency: 16 MHz
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Cpu Speed: 16MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 64
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Frequency Typ: 20MHz
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Clock Frequency: 16MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

7.7.3 Serial Communications Control Register 2
The SCCR2 register provides the control bits that enable or disable individual SCI functions.
TIE — Transmit Interrupt Enable Bit
TCIE — Transmit Complete Interrupt Enable Bit
RIE — Receiver Interrupt Enable Bit
ILIE — Idle-Line Interrupt Enable Bit
TE — Transmitter Enable Bit
RE — Receiver Enable Bit
RWU — Receiver Wakeup Control Bit
SBK — Send Break
Freescale Semiconductor
When TE goes from 0 to 1, one unit of idle character time (logic 1) is queued as a preamble.
At least one character time of break is queued and sent each time SBK is written to 1. As long as the
SBK bit is set, break characters are queued and sent. More than one break may be sent if the
transmitter is idle at the time the SBK bit is toggled on and off, as the baud rate clock edge could occur
between writing the 1 and writing the 0 to SBK.
0 = TDRE interrupts disabled
1 = SCI interrupt requested when TDRE status flag is set
0 = TC interrupts disabled
1 = SCI interrupt requested when TC status flag is set
0 = RDRF and OR interrupts disabled
1 = SCI interrupt requested when RDRF flag or the OR status flag is set
0 = IDLE interrupts disabled
1 = SCI interrupt requested when IDLE status flag is set
0 = Transmitter disabled
1 = Transmitter enabled
0 = Receiver disabled
1 = Receiver enabled
0 = Normal SCI receiver
1 = Wakeup enabled and receiver interrupts inhibited
0 = Break generator off
1 = Break codes generated
Address:
Reset:
Read:
Write:
Figure 7-5. Serial Communications Control Register 2 (SCCR2)
$102D
Bit 7
TIE
0
TCIE
6
0
M68HC11E Family Data Sheet, Rev. 5.1
RIE
5
0
ILIE
4
0
TE
3
0
RE
2
0
RWU
1
0
Bit 0
SBK
0
SCI Registers
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