MC68SEC000AA16 Freescale Semiconductor, MC68SEC000AA16 Datasheet - Page 127

IC MPU 32BIT 16MHZ 64-QFP

MC68SEC000AA16

Manufacturer Part Number
MC68SEC000AA16
Description
IC MPU 32BIT 16MHZ 64-QFP
Manufacturer
Freescale Semiconductor
Series
M68000r
Datasheets

Specifications of MC68SEC000AA16

Processor Type
M680x0 32-Bit
Speed
16MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
64-QFP
Processor Series
M680xx
Core
CPU32
Maximum Clock Frequency
16 MHz
Operating Supply Voltage
3.3 V, 5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Core Size
32 Bit
Cpu Speed
16MHz
Digital Ic Case Style
QFP
No. Of Pins
64
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Frequency Typ
20MHz
Filter Terminals
SMD
Rohs Compliant
Yes
Clock Frequency
16MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 9
Timing Systems
9.1 Introduction
The M68HC11 timing system is composed of five clock divider chains. The main clock divider chain
includes a 16-bit free-running counter, which is driven by a programmable prescaler. The main timer’s
programmable prescaler provides one of the four clocking rates to drive the 16-bit counter. Two prescaler
control bits select the prescale rate.
The prescaler output divides the system clock by 1, 4, 8, or 16. Taps off of this main clocking chain drive
circuitry that generates the slower clocks used by the pulse accumulator, the real-time interrupt (RTI), and
the computer operating properly (COP) watchdog subsystems, also described in this section. Refer to
Figure
9-1.
All main timer system activities are referenced to this free-running counter. The counter begins
incrementing from $0000 as the MCU comes out of reset and continues to the maximum count, $FFFF.
At the maximum count, the counter rolls over to $0000, sets an overflow flag, and continues to increment.
As long as the MCU is running in a normal operating mode, there is no way to reset, change, or interrupt
the counting. The capture/compare subsystem features three input capture channels, four output
compare channels, and one channel that can be selected to perform either input capture or output
compare. Each of the three input capture functions has its own 16-bit input capture register (time capture
latch) and each of the output compare functions has its own 16-bit compare register. All timer functions,
including the timer overflow and RTI, have their own interrupt controls and separate interrupt vectors.
The pulse accumulator contains an 8-bit counter and edge select logic. The pulse accumulator can
operate in either event counting mode or gated time accumulation mode. During event counting mode,
the pulse accumulator’s 8-bit counter increments when a specified edge is detected on an input signal.
During gated time accumulation mode, an internal clock source increments the 8-bit counter while an
input signal has a predetermined logic level.
The real-time interrupt (RTI) is a programmable periodic interrupt circuit that permits pacing the execution
of software routines by selecting one of four interrupt rates.
15
The COP watchdog clock input (E ÷ 2
) is tapped off of the free-running counter chain. The COP
automatically times out unless it is serviced within a specific time by a program reset sequence. If the COP
is allowed to time out, a reset is generated, which drives the RESET pin low to reset the MCU and the
external system. Refer to
Table 9-1
for crystal-related frequencies and periods.
M68HC11E Family Data Sheet, Rev. 5.1
Freescale Semiconductor
127

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