MC68SEC000AA16 Freescale Semiconductor, MC68SEC000AA16 Datasheet - Page 140

• Manufacturer Part Number: MC68SEC000AA16
• Description: IC MPU 32BIT 16MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68SEC000AA16

• Processor Type: M680x0 32-Bit
• Speed: 16MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 64-QFP
• Processor Series: M680xx
• Core: CPU32
• Maximum Clock Frequency: 16 MHz
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Cpu Speed: 16MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 64
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Frequency Typ: 20MHz
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Clock Frequency: 16MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Timing Systems
9.4.10 Timer Interrupt Flag Register 2
Bits in this register indicate when certain timer system events have occurred. Coupled with the four
high-order bits of TMSK2, the bits of TFLG2 allow the timer subsystem to operate in either a polled or
interrupt driven system. Each bit of TFLG2 corresponds to a bit in TMSK2 in the same position.
Clear flags by writing a 1 to the corresponding bit position(s).
TOF — Timer Overflow Interrupt Flag
RTIF — Real-Time (Periodic) Interrupt Flag
PAOVF — Pulse Accumulator Overflow Interrupt Flag
PAIF — Pulse Accumulator Input Edge Interrupt Flag
Bits [3:0] — Unimplemented
9.5 Real-Time Interrupt (RTI)
The real-time interrupt (RTI) feature, used to generate hardware interrupts at a fixed periodic rate, is
controlled and configured by two bits (RTR1 and RTR0) in the pulse accumulator control (PACTL)
register. The RTII bit in the TMSK2 register enables the interrupt capability. The four different rates
available are a product of the MCU oscillator frequency and the value of bits RTR[1:0]. Refer to
which shows the periodic real-time interrupt rates.
The clock source for the RTI function is a free-running clock that cannot be stopped or interrupted except
by reset. This clock causes the time between successive RTI timeouts to be a constant that is
140
Set when TCNT changes from $FFFF to $0000
Refer to
Refer to
Refer to
Always read 0
9.5 Real-Time Interrupt
9.7 Pulse
9.7 Pulse
Address:
Reset:
RTR[1:0]
Read:
Write:
0 0
0 1
1 0
1 1
Accumulator.
Accumulator.
$1025
Bit 7
TOF
Figure 9-20. Timer Interrupt Flag 2 Register (TFLG2)
0
E = 3 MHz
= Unimplemented
10.923 ms
21.845 ms
2.731 ms
5.461 ms
RTIF
6
0
M68HC11E Family Data Sheet, Rev. 5.1
(RTI).
PAOVF
Table 9-5. RTI Rates
5
0
E = 2 MHz
16.384 ms
32.768 ms
4.096 ms
8.192 ms
PAIF
4
0
3
0
E = 1 MHz
16.384 ms
32.768 ms
65.536 ms
8.192 ms
2
0
1
0
E = X MHz
(E/2
(E/2
(E/2
(E/2
Freescale Semiconductor
13
14
15
16
)
)
)
)
Bit 0
0
Table
9-5,