MC68SEC000AA16 Freescale Semiconductor, MC68SEC000AA16 Datasheet - Page 141

• Manufacturer Part Number: MC68SEC000AA16
• Description: IC MPU 32BIT 16MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: M68000r

Specifications of MC68SEC000AA16

• Processor Type: M680x0 32-Bit
• Speed: 16MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 64-QFP
• Processor Series: M680xx
• Core: CPU32
• Maximum Clock Frequency: 16 MHz
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Cpu Speed: 16MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 64
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Frequency Typ: 20MHz
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Clock Frequency: 16MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

independent of the software latencies associated with flag clearing and service. For this reason, an RTI
period starts from the previous timeout, not from when RTIF is cleared.
Every timeout causes the RTIF bit in TFLG2 to be set, and if RTII is set, an interrupt request is generated.
After reset, one entire RTI period elapses before the RTIF is set for the first time. Refer to the
Interrupt Mask 2
Register.
9.5.1 Timer Interrupt Mask Register 2
This register contains the real-time interrupt enable bits.
TOI — Timer Overflow Interrupt Enable Bit
RTII — Real-Time Interrupt Enable Bit
PAOVI — Pulse Accumulator Overflow Interrupt Enable Bit
PAII — Pulse Accumulator Input Edge Bit
Bits [3:2] — Unimplemented
PR[1:0] — Timer Prescaler Select Bits
Freescale Semiconductor
Refer to
Refer to
Always read 0
Refer to
0 = TOF interrupts disabled
1 = Interrupt requested when TOF is set to 1
0 = RTIF interrupts disabled
1 = Interrupt requested when RTIF set to 1
9.7 Pulse
9.7 Pulse
Table
Address:
Bits in TMSK2 correspond bit for bit with flag bits in TFLG2. Bits in TMSK2
enable the corresponding interrupt sources.
Reset:
Read:
Write:
Register,
9-4.
Accumulator.
Accumulator.
$1024
Figure 9-21. Timer Interrupt Mask 2 Register (TMSK2)
Bit 7
TOI
0
9.5.2 Timer Interrupt Flag Register
= Unimplemented
RTI
6
0
M68HC11E Family Data Sheet, Rev. 5.1
PAOVI
5
0
NOTE
PAII
4
0
3
0
2, and
9.5.3 Pulse Accumulator Control
2
0
PR1
1
0
Real-Time Interrupt (RTI)
Bit 0
PR0
0
9.4.9 Timer
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