PSB21383HV13XT Infineon Technologies, PSB21383HV13XT Datasheet - Page 34

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PSB21383HV13XT

Manufacturer Part Number
PSB21383HV13XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21383HV13XT

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
Data Sheet
The mapping of all accessible registers can be found in figure 92 in chapter 7.
The microcontroller interface also consists of a microcontroller clock generation at pin
MCLK and an interrupt request at pin INT.
2.1.1
The serial control interface (SCI) is compatible to the SPI interface of Motorola or
Siemens C510 family of microcontrollers.
The SCI consists of 4 lines: SCLK, SDX, SDR and CS. Data are transferred via the lines
SDR and SDX at the rate given by SCLK. The falling edge of CS indicates the beginning
of a serial access to the registers. Incoming data is latched at the rising edge of SCLK
and shifts out at the falling edge of SCLK. Each access must be terminated by a rising
edge of CS. Data is transferred in groups of 8 bits with the MSB first.
Figure 15 shows the timing of a one byte read/write access via the serial control
interface.
Serial Control Interface (SCI)
24
PSB 21381/2
PSB 21383/4
Interfaces
2001-03-12

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