PSB21383HV13XT Infineon Technologies, PSB21383HV13XT Datasheet - Page 46

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PSB21383HV13XT

Manufacturer Part Number
PSB21383HV13XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21383HV13XT

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
Data Sheet
2.2.1
The frame structure on the IOM-2 data ports (DU,DD) in IOM-2 terminal mode is shown
in figure 20
.
Figure 20
IOM -2 Frame Structure in Terminal Mode
The frame is composed of three channels
• Channel 0 contains 144-kbit/s of user and signaling data (2B + D), a MONITOR
• Channel 1 contains two 64-kbit/s intercommunication channels (IC) plus a MONITOR
• Channel 2 is used for the TlC-bus access. Additionally channel 2 supports further IC
Note: Each octet related to any integrated functional block can be programmed to any
programming channel (MON0) and a command/indication channel (CI0) for control
and programming of the layer-1 transceiver.
and command/indicate channel (MON1, CI1) to program or transfer data to other IOM-
2 devices.
and MON channels.
timeslot (see chapter 7.3.2) except the C/I0- and D- channels that are always
related to timeslot 0.
IOM-2 Frame Structure
36
PSB 21381/2
PSB 21383/4
Interfaces
2001-03-12

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