CX28229G-14 Mindspeed Technologies, CX28229G-14 Datasheet - Page 134

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CX28229G-14

Manufacturer Part Number
CX28229G-14
Description
ATM IMA 800Mbps 1.8V/3.3V 256-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet

Specifications of CX28229G-14

Package
256BGA
Utopia Type
Level 2
Typical Operating Supply Voltage
1.8|3.3 V
Minimum Operating Supply Voltage
1.71|3 V
Maximum Operating Supply Voltage
1.89|3.6 V
Maximum Output Rate
800 Mbps

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CX28229G-14
Manufacturer:
MNDSPEED
Quantity:
16
Registers
7-34
Bit
7
6
5
4
3
2
1
0
Default
0
0
0
0
0
0
0
0
0x01—ENSUMINT (Summary Interrupt Control Register)
EnOneSecInt
EnTxCellInt
EnRxCellInt
The ENSUMINT register controls which of the interrupts listed in the SUMINT
register (0x00) appear in the SUMPORT register and on the MicroInt* (pin T1),
provided the corresponding ENSUMPORT bit is enabled and EnIntPin (bit 3) in the
MODE register (0x0202) is enabled.
Name
Mindspeed Technologies
Reserved, set to a logical 0.
Reserved, set to a logical 0.
Reserved, set to a logical 0.
Reserved, set to a logical 0.
When written to a logical 1, this bit enables the one-second interrupt generated by
the OneSecIO pin (pin R5) to appear on the MicroInt* output pin (pin T1).
Reserved, set to a logical 0.
When written to a logical 1, this bit enables the transmit cell interrupts located in the
TxCellInt register (0x2C). These interrupts appear can on the MicroInt* pin (pin T1),
provided that EnPortInt in the ENSUMPORT register (0x0201) is enabled for this
port and EnIntPin (bit 3) in the MODE register (0x0202) is enabled.
When written to a logical 1, this bit enables the receive cell interrupts located in the
RxCellInt register (0x2D). These interrupts can appear on the MicroInt* pin (pin T1),
provided that EnPortInt in the ENSUMPORT register (0x0201) is enabled for this
port and EnIntPin (bit 3) in the MODE register (0x0202) is enabled.
Description
CX28224/5/9 Data Sheet
28229-DSH-001-D

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