CX28229G-14 Mindspeed Technologies, CX28229G-14 Datasheet - Page 166
CX28229G-14
Manufacturer Part Number
CX28229G-14
Description
ATM IMA 800Mbps 1.8V/3.3V 256-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28229G-14.pdf
(271 pages)
Specifications of CX28229G-14
Package
256BGA
Utopia Type
Level 2
Typical Operating Supply Voltage
1.8|3.3 V
Minimum Operating Supply Voltage
1.71|3 V
Maximum Operating Supply Voltage
1.89|3.6 V
Maximum Output Rate
800 Mbps
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Part Number:
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Registers
7-66
FOOTNOTE:
(1)
This bit is a pointer to the next interrupt indication register to be read. This bit will be cleared when the interrupt bit in the
corresponding interrupt indication register is read and automatically cleared.
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Default
Default
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0x204—SUMPORT (Summary Port Interrupt Status Register)
0x205—ENSUMPORT (Summary Port Interrupt Control Register)
EnPortInt[7]
EnPortInt[6]
EnPortInt[5]
EnPortInt[4]
EnPortInt[3]
EnPortInt[2]
EnPortInt[1]
EnPortInt[0]
PortInt[7]
PortInt[6]
PortInt[5]
PortInt[4]
PortInt[3]
PortInt[2]
PortInt[1]
PortInt[0]
Name
Name
1
1
1
1
1
1
1
1
Mindspeed Technologies
This bit is a summary indicator of the interrupts from the Port 7 SUMINT register
(0x1C0).
This bit is a summary indicator of the interrupts from the Port 6 SUMINT register
(0x180).
This bit is a summary indicator of the interrupts from the Port 5 SUMINT register
(0x140).
This bit is a summary indicator of the interrupts from the Port 4 SUMINT register
(0x100).
This bit is a summary indicator of the interrupts from the Port 3 SUMINT register
(0x0C0).
This bit is a summary indicator of the interrupts from the Port 2 SUMINT register
(0x080).
This bit is a summary indicator of the interrupts from the Port 1 SUMINT register
(0x040).
This bit is a summary indicator of the interrupts from the Port 0 SUMINT register
(0x000).
When set, this bit enables PortInt[7] to appear on the MicroInt* output.
When set, this bit enables PortInt[6] to appear on the MicroInt* output.
When set, this bit enables PortInt[5] to appear on the MicroInt* output.
When set, this bit enables PortInt[4] to appear on the MicroInt* output.
When set, this bit enables PortInt[3] to appear on the MicroInt* output.
When set, this bit enables PortInt[2] to appear on the MicroInt* output.
When set, this bit enables PortInt[1] to appear on the MicroInt* output.
When set, this bit enables PortInt[0] to appear on the MicroInt* output.
™
Description
Description
CX28224/5/9 Data Sheet
28229-DSH-001-D
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