CX28229G-14 Mindspeed Technologies, CX28229G-14 Datasheet - Page 151
CX28229G-14
Manufacturer Part Number
CX28229G-14
Description
ATM IMA 800Mbps 1.8V/3.3V 256-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28229G-14.pdf
(271 pages)
Specifications of CX28229G-14
Package
256BGA
Utopia Type
Level 2
Typical Operating Supply Voltage
1.8|3.3 V
Minimum Operating Supply Voltage
1.71|3 V
Maximum Operating Supply Voltage
1.89|3.6 V
Maximum Output Rate
800 Mbps
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CX28229G-14
Manufacturer:
MNDSPEED
Quantity:
16
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CX28224/5/9 Data Sheet
28229-DSH-001-D
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Default
Default
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0x23—RXIDL4 (Receive Idle Cell Header Control Register 4)
0x24—IDLMSK1 (Receive Idle Cell Mask Control Register 1)
RxIdl4[7]
RxIdl4[6]
RxIdl4[5]
RxIdl4[4]
RxIdl4[3]
RxIdl4[2]
RxIdl4[1]
RxIdl4[0]
IdlMsk1[7]
IdlMsk1[6]
IdlMsk1[5]
IdlMsk1[4]
IdlMsk1[3]
IdlMsk1[2]
IdlMsk1[1]
IdlMsk1[0]
The RXIDL4 register contains the fourth byte of the Receive Idle Cell Header. (See
0x20—RXIDL1.)
The IDLMSK1 register contains the first byte of the Receive Idle Cell Mask. It
modifies ATM cell screening, which compares the Receive Idle Cell Header Registers
to the incoming cells. Setting a bit in the Mask Register causes the corresponding bit
in the received ATM idle cell header to be disregarded for screening. For example,
setting IDLMSK1 bit 0 to 1 causes cells to be accepted as ATM idle cells with either
1 or 0 in the octet 1, bit 0 position. This header consists of 32 bits divided among four
registers.
Name
Name
Mindspeed Technologies
These bits hold the Receive Idle cell header for Octet 4 of the incoming cell.
These bits hold the Receive Idle cell header mask for Octet 1 of the incoming cell.
Description
Description
™
Registers
7
-
51
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