DS21Q58L+ Maxim Integrated Products, DS21Q58L+ Datasheet - Page 21

• Manufacturer Part Number: DS21Q58L+
• Description: IC TXRX E1 QUAD 3.3V 100LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS21Q58L+

• Function: Transceiver
• Interface: E1
• Number Of Circuits: 4
• Voltage - Supply: 3.14 V ~ 3.47 V
• Current - Supply: 230mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Includes: AIS Alarms Detector and Generator, Loopback Functions, PRBS Generator / Detector, Remote Detector and Generator
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

8.2 Framer Loopback
When CCR1.7 is set to 1, the DS21Q58 enters a framer loopback (FLB) mode
in testing and debugging applications. In FLB mode, the SCT loops data from the transmitter back to the receiver.
When FLB is enabled, the following occurs:
1) Data is transmitted as normal at TTIP and TRING.
2) The RCLK output is replaced with the TCLK input.
Register Name:
Register Description:
Register Address:
Bit #
Name
LOTCMC
RSERC
VCRFS
NAME
ECUS
RCLA
TCSS
AAIS
ARA
ECUS
7
BIT
7
6
5
4
3
2
1
0
VCRFS
Error Counter Update Select. See Section
0 = update error counters once a second
1 = update error counters every 62.5ms (500 frames)
VCR Function Select. See Section
0 = count bipolar violations (BPVs)
1 = count code violations (CVs)
Automatic AIS Generation
0 = disabled
1 = enabled
Automatic Remote Alarm Generation
0 = disabled
1 = enabled
RSER Control
0 = allow RSER to output data as received under all conditions
1 = force RSER to 1 under loss-of-frame alignment conditions
Loss-of-Transmit Clock Mux Control. Determines whether the transmit
formatter should switch to the ever present RCLK if the TCLK should fail to
transition.
0 = do not switch to RCLK if TCLK stops
1 = switch to RCLK if TCLK stops
Receive Carrier Loss (RCL) Alternate Criteria
0 = RCL declared upon 255 consecutive 0s (125ms)
1 = RCL declared upon 2048 consecutive 0s (1ms)
Transmit Clock Source Select. This function allows the user to internally
select RCLK as the clock source for the transmit formatter.
0 = source of transmit clock is determined by CCR2.2 (LOTCMC)
1 = forces transmitter to internally switch to RCLK as source of transmit clock;
signal at TCLK pin is ignored
6
CCR2
Common Control Register 2
13 Hex
AAIS
5
ARA
4
21 of 74
RSERC
FUNCTION
3
10
for details.
LOTCMC
10
for details.
2
(Figure
RCLA
1
3-1). This loopback is useful
TCSS
0