DS21Q58L+ Maxim Integrated Products, DS21Q58L+ Datasheet - Page 34

IC TXRX E1 QUAD 3.3V 100LQFP

DS21Q58L+

Manufacturer Part Number
DS21Q58L+
Description
IC TXRX E1 QUAD 3.3V 100LQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21Q58L+

Function
Transceiver
Interface
E1
Number Of Circuits
4
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
230mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
AIS Alarms Detector and Generator, Loopback Functions, PRBS Generator / Detector, Remote Detector and Generator
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
10.
Each DS21Q58 transceiver contains a set of four counters that record bipolar (BPVs) or code violations (CVs),
errors in the CRC4 SMF codewords, E bits as reported by the far end, and word errors in the FAS. The E-bit
counter is reconfigured for counting errors in the PRBS pattern if receive PRBS is enabled. Each of these four
counters is automatically updated on either one-second boundaries (CCR2.70 = 0) or every 62.5ms (CCR2.7 = 1)
as determined by the timer in status register 2 (SR2.4). Hence, these registers contain performance data from
either the previous second or the previous 62.5ms. The user can use the interrupt from the one-second timer to
determine when to read these registers. The user has a full second (or 62.5ms) to read the counters before the
data is lost. The counters saturate at their respective maximum counts and do not roll over.
10.1 BPV or CV Counter
Violation count register 1 (VCR1) is the most significant word and VCR2 is the least significant word of a 16-bit
counter that records either BPVs or CVs. If CCR2.6 = 0, the VCR counts BPVs. BPVs are defined as consecutive
marks of the same polarity. In this mode, if the HDB3 mode is set for the receiver through CCR1.2, then HDB3
codewords are not counted as BPVs. If CCR2.6 = 1, the VCR counts CVs as defined in ITU O.161. CVs are
defined as consecutive BPVs of the same polarity. In most applications, the framer should be programmed to count
BPVs when receiving AMI code and to count CVs when receiving HDB3 code. This counter increments at all times
and is not disabled by loss-of-sync conditions. The counter saturates at 65,535 and does not roll over. The bit-error
rate on an E1 line would have to be greater than 10
Register Name:
Register Description:
Register Address:
Bit #
Name
10.2 CRC4 Error Counter
CRC4 count register 1 (CRCCR1) is the most significant word and CRCCR2 is the least significant word of a 16-bit
counter that records word errors in the cyclic redundancy check 4 (CRC4). Since the maximum CRC4 count in a
one-second period is 1000, this counter cannot saturate. The counter is disabled during loss of sync at either the
FAS or CRC4 level; it continues to count if loss-of-multiframe sync occurs at the CAS level. CRCCR1 and
CRCCR2 have an alternate function.
Register Name:
Register Description:
Register Address:
Bit #
Name
CRC15
NAME
NAME
CRC0
V15
V0
ERROR COUNT REGISTERS
CRC15
CRC7
V15
V7
7
7
CRCCR1.7
CRCCR2.0
VCR1.7
VCR2.0
BIT
BIT
CRC14
CRC6
V14
V6
6
6
VCR1, VCR2
Bipolar Violation Count Registers
00 Hex, 01 Hex
CRCCR1, CRCCR2
CRC4 Count Registers
02 Hex, 03 Hex
MSB of the 16-bit code violation count.
LSB of the 16-bit code violation count.
MSB of the 16-bit CRC4 error count.
LSB of the 16-bit CRC4 error count.
CRC13
CRC5
V13
V5
5
5
CRC12
CRC4
V12
V4
4
4
-2
before the VCR would saturate.
34 of 74
CRC11
CRC3
V11
V3
3
3
FUNCTION
FUNCTION
CRC10
CRC2
V10
V2
2
2
CRC9
CRC1
V9
V1
1
1
CRC8
CRC0
V8
V0
0
0

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