DS21Q58L+ Maxim Integrated Products, DS21Q58L+ Datasheet - Page 41

• Manufacturer Part Number: DS21Q58L+
• Description: IC TXRX E1 QUAD 3.3V 100LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS21Q58L+

• Function: Transceiver
• Interface: E1
• Number Of Circuits: 4
• Voltage - Supply: 3.14 V ~ 3.47 V
• Current - Supply: 230mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Includes: AIS Alarms Detector and Generator, Loopback Functions, PRBS Generator / Detector, Remote Detector and Generator
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

15.
Depending on the DS21Q58’s operating mode, the transmit clock can be derived from different sources. In a basic
configuration, where the IBO function is disabled, the transmit clock is normally sourced from the TCLK pin. In this
mode, a 2.048MHz clock with ±50ppm accuracy is applied to the TCLK pin. If the signal at TCLK is lost, the
DS21Q58 automatically switches to either the system reference clock present on the REFCLK pin or to the
recovered clock off the same port, depending on which source the host assigned as the backup clock. At the same
time the host can be notified of the loss-of-transmit clock through an interrupt. The host can at any time force a
switchover to one of the two backup clock sources regardless of the state of the TCLK pin.
When the IBO function is enabled, the transmit clock must be synchronous to the system clock since slips are not
allowed in the transmit direction. In this mode, the TCLK pin is ignored, and a transmit clock is automatically
provided by the IBO circuit by dividing the clock present on the SYSCLK pin by 2, 4, or 8. In this configuration, if the
signal present on the SYSCLK pin is lost, the DS21Q58 automatically switches to either the system reference clock
or to the recovered clock off the same port, depending on which source the host assigned as the backup clock. The
host can at any time force a switchover to one of the two backup clock sources regardless of the state of the
SYSCLK pin.
16.
The transmit idle registers (TIR1/2/3/4) determine which of the 32 E1 channels should be overwritten with the code
placed in the transmit idle definition register (TIDR). This allows the same 8-bit code to be placed into any of the 32
E1 channels. Each of the bit positions in the transmit idle registers represents a DS0 channel in the outgoing frame.
When these bits are set to 1, the corresponding channel transmits the idle code contained in the TIDR.
Register Name:
Register Description:
Register Address:
Bit #
Name
Register Name:
Register Description:
Register Address:
Bit #
Name
CH1 to CH32
NAME
TIDR7
TIDR6
TIDR5
TIDR4
TIDR3
TIDR2
TIDR1
TIDR0
NAME
TRANSMIT CLOCK SOURCE
IDLE CODE INSERTION
TIDR7
CH16
CH24
CH32
CH8
7
7
BIT
TIR1.0 to 4.7
7
6
5
4
3
2
1
0
TIDR6
CH15
CH23
CH31
CH7
6
6
BIT
TIR1, TIR2, TIR3, TIR4
Transmit Idle Registers
24 Hex, 25 Hex, 26 Hex, 27 Hex
TIDR
Transmit Idle Definition Register
23 Hex
MSB of the Idle Code (This bit is transmitted first.)
—
—
—
—
—
—
LSB of the Idle Code (This bit is transmitted last.)
TIDR5
CH14
CH22
CH30
CH6
5
5
Transmit Idle Code-Insertion Control Bits
0 = do not insert the idle code in the TIDR into this channel
1 = insert the idle code in the TIDR into this channel
TIDR4
CH13
CH21
CH29
CH5
4
4
41 of 74
TIDR3
CH12
CH20
CH28
CH4
FUNCTION
3
3
FUNCTION
TIDR2
CH11
CH19
CH27
CH3
2
2
TIDR1
CH10
CH18
CH26
CH2
1
1
TIDR0
CH17
CH25
CH1
CH9
0
0