SAM3A8C Atmel Corporation, SAM3A8C Datasheet - Page 1120

• Manufacturer Part Number: SAM3A8C
• Manufacturer: Atmel Corporation

This bit is cleared when the UOTGHS_DEVICR.EORSTC bit is written to one to acknowledge the interrupt.
• SOF: Start of Frame Interrupt
This bit is set when a USB “Start of Frame” PID (SOF) has been detected (every 1 ms). This triggers a USB interrupt if
SOFE is one. The FNUM field is updated. In High-speed mode, the MFNUM field is cleared.
This bit is cleared when the UOTGHS_DEVICR.SOFC bit is written to one to acknowledge the interrupt.
• MSOF: Micro Start of Frame Interrupt
This bit is set in High-speed mode when a USB “Micro Start of Frame” PID (SOF) has been detected (every 125 us). This
triggers a USB interrupt if MSOFE is one. The MFNUM field is updated. The FNUM field is unchanged.
This bit is cleared when the UOTGHS_DEVICR.MSOFC bit is written to one to acknowledge the interrupt.
• SUSP: Suspend Interrupt
This bit is set when a USB “Suspend” idle bus state has been detected for 3 frame periods (J state for 3 ms). This triggers
a USB interrupt if UOTGHS_DEVIMR.SUSPE is one.
This bit is cleared when the UOTGHS_DEVICR.SUSPC bit is written to one to acknowledge the interrupt.
This bit is cleared when the Wake-Up (WAKEUP) interrupt bit is set.
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SAM3X/A
SAM3X/A
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12