SAM3A8C Atmel Corporation, SAM3A8C Datasheet - Page 754

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SAM3A8C

Manufacturer Part Number
SAM3A8C
Description
Manufacturer
Atmel Corporation
Datasheets
34.3
Figure 34-1. UART Functional Block Diagram
Table 34-1.
34.4
34.4.1
34.4.2
754
754
Pin Name
URXD
UTXD
Block Diagram
Product Dependencies
Management
SAM3X/A
SAM3X/A
Controller
I/O Lines
Power Management
Power
UART Pin Description
APB
Peripheral
Bridge
The UART pins are multiplexed with PIO lines. The programmer must first configure the corre-
sponding PIO Controller to enable I/O line operations of the UART.
Table 34-2.
The UART clock is controllable through the Power Management Controller. In this case, the pro-
grammer must first configure the PMC to enable the UART clock. Usually, the peripheral
identifier used for this purpose is 1.
Description
UART Receive Data
UART Transmit Data
Instance
UART
UART
MCK
I/O Lines
Baud Rate
Generator
UART
Peripheral DMA Controller
Signal
URXD
UTXD
Transmit
Interrupt
Receive
Control
Type
Input
Output
I/O Line
PA8
PA9
uart_irq
Parallel
Output
Input/
Peripheral
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
A
A
URXD
UTXD

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