SAM3A8C Atmel Corporation, SAM3A8C Datasheet - Page 53
SAM3A8C
Manufacturer Part Number
SAM3A8C
Description
Manufacturer
Atmel Corporation
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11. ARM Cortex
11.1
11.2
11.3
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
About this section
Embedded Characteristics
About the Cortex-M3 processor and core peripherals
®
M3 Processor
This section provides the information required for application and system-level software devel-
opment. It does not provide information on debug components, features, or operation.
This material is for microcontroller software and hardware engineers, including those who have
no experience of ARM products.
Note: The information in this section is reproduced from source material provided to Atmel by
ARM Ltd. in terms of Atmel’s license for the ARM Cortex
is copyright ARM Ltd., 2008 - 2009.
• Version 2.0
• Thumb-2 (ISA) subset consisting of all base Thumb-2 instructions, 16-bit and 32-bit.
• Harvard processor architecture enabling simultaneous instruction fetch with data load/store.
• Three-stage pipeline.
• Single cycle 32-bit multiply.
• Hardware divide.
• Thumb and Debug states.
• Handler and Thread modes.
• Low latency ISR entry and exit.
• SysTick Timer
• Nested Vectored Interrupt Controller
• The Cortex-M3 processor is a high performance 32-bit processor designed for the
• outstanding processing performance combined with fast interrupt handling
• enhanced system debug with extensive breakpoint and trace capabilities
microcontroller market. It offers significant benefits to developers, including:
– 24-bit down counter
– Self-reload capability
– Flexible system timer
– Thirty maskable interrupts
– Sixteen priority levels
– Dynamic reprioritization of interrupts
– Priority grouping
– Support for tail-chaining and late arrival of interrupts.
– Processor state automatically saved on interrupt entry, and restored on interrupt exit,
selection of preempting interrupt levels and non preempting interrupt levels.
back-to-back interrupt processing without the overhead of state saving and
restoration between interrupts.
with no instruction overhead.
™
-M3 processor core. This information
SAM3X/A
SAM3X/A
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