SAM3A8C Atmel Corporation, SAM3A8C Datasheet - Page 469
SAM3A8C
Manufacturer Part Number
SAM3A8C
Description
Manufacturer
Atmel Corporation
- Current page: 469 of 1465
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Figure 26-34. Read Enable Timing Configuration Working with NAND Flash Device
Figure 26-35. Ready/Busy Timing Configuration
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
mck
cen
cle
mck
wen
ale
ren
rbn
ren
Use TWB field in SMC_TIMINGS register to configure the maximum elapsed time between the
rising edge of wen signal and the falling edge of rbn signal. Use TRR field in the SMC_TIMINGS
register to program the number of clock cycle between the rising edge of the rbn signal and the
falling edge of ren signal.
• Ready/Busy Signal Timing configuration working with a NAND Flash device
t
WB
t
AR
busy
t
CLR
t
REN_SETUP
t
REN_CYCLE
t
t
REN_PULSE
RR
t
REH
SAM3X/A
SAM3X/A
469
469
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