SAM3A8C Atmel Corporation, SAM3A8C Datasheet - Page 825
SAM3A8C
Manufacturer Part Number
SAM3A8C
Description
Manufacturer
Atmel Corporation
- Current page: 825 of 1465
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Figure 35-47. Master Node Configuration, NACT=SUBSCRIBE
Figure 35-48. Master Node Configuration, NACT=IGNORE
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
TXRDY
RXRDY
US_LINIR
US_RHR
LINTC
Slave Node Configuration
TXRDY
RXRDY
US_LINIR
LINTC
Read
Write
Write
Break
Break
Synch
IMPORTANT: if the NACT configuration for this frame is PUBLISH, the US_LINMR register,
must be write with NACT = PUBLISH even if this field is already correctly configured, in order to
set the TXREADY flag and the corresponding write transfer request.
Header
Header
Synch
• Write TXEN and RXEN in US_CR to enable both the transmitter and the receiver.
• Write USART_MODE in US_MR to select the LIN mode and the Slave Node configuration.
• Write CD and FP in US_BRGR to configure the baud rate.
• Wait until LINID in US_CSR rises
• Check LINISFE and LINPE errors
• Read IDCHR in US_RHR
• Write NACT, PARDIS, CHKDIS, CHKTYPE, DLCM and DLC in US_LINMR to configure the
frame transfer.
Protected
Identifier
Protected
Identifier
Data3
Data3
Frame slot = TFrame_Maximum
Response
Response
space
space
Frame slot = TFrame_Maximum
Frame
Frame
Data 1
Data 1
Data 1
Data N-2
Data N-1
Response
Response
Data N-1
Data N-1
Data N
Data N
Data N
Checksum
Checksum
FSDIS=1
FSDIS=1
SAM3X/A
SAM3X/A
space
frame
space
frame
Inter-
Inter-
FSDIS=0
FSDIS=0
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