SAM3A8C Atmel Corporation, SAM3A8C Datasheet - Page 351
SAM3A8C
Manufacturer Part Number
SAM3A8C
Description
Manufacturer
Atmel Corporation
- Current page: 351 of 1465
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11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Figure 23-2. DMAC Transfer Hierarchy for Non-Memory Peripheral
Figure 23-3. DMAC Transfer Hierarchy for Memory
Buffer: A buffer of DMAC data. The amount of data (length) is determined by the flow controller.
For transfers between the DMAC and memory, a buffer is broken directly into a sequence of
AMBA bursts and AMBA single transfers.
For transfers between the DMAC and a non-memory peripheral, a buffer is broken into a
sequence of DMAC transactions (single and chunks). These are in turn broken into a sequence
of AMBA transfers.
Transaction: A basic unit of a DMAC transfer as determined by either the hardware or software
handshaking interface. A transaction is only relevant for transfers between the DMAC and a
source or destination peripheral if the source or destination peripheral is a non-memory device.
There are two types of transactions: single transfer and chunk transfer.
– Single transfer: The length of a single transaction is always 1 and is converted to a
– Chunk transfer: The length of a chunk is programmed into the DMAC. The chunk is
Transfer
AMBA
Transfer
single AMBA access.
then converted into a sequence of AHB access.DMAC executes each AMBA burst
transfer by performing incremental bursts that are no longer than 16 beats.
Buffer
Burst
Chunk
Transfer
AMBA
Buffer
Burst
Transfer
AMBA
Transfer
Burst
Chunk
Buffer
DMAC Transfer
Transfer
AMBA
Burst
Buffer
DMAC Transfer
Transfer
AMBA
Burst
Transfer
Chunk
Buffer
Transfer
AMBA
Burst
Transfer
AMBA
Single
Buffer
Transfer
AMBA
Single
Transfer
Transfer
Single
AMBA
Single
DMA Transfer
Level
Buffer Transfer
Level
AMBA Transfer
Level
DMA Transfer
Level
Buffer Transfer
Level
DMA Transaction
Level
AMBA Transfer
Level
SAM3X/A
SAM3X/A
351
351
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