AD9146 Analog Devices, AD9146 Datasheet - Page 39

• Manufacturer Part Number: AD9146
• Description: Dual, 16-Bit, 1230 MSPS, TxDAC+® Digital-to-Analog Converter
• Manufacturer: Analog Devices

Specifications of AD9146

• Resolution (bits): 16bit
• Dac Update Rate: 1.23GSPS
• Dac Settling Time: n/a
• Max Pos Supply (v): +3.47V
• Single-supply: No
• Dac Type: Current Out
• Dac Input Format: Byte,LVDS,Nibble

Data Sheet
ANALOG OUTPUTS
TRANSMIT DAC OPERATION
Figure 50 shows a simplified block diagram of the transmit path
DACs. The DAC core consists of a current source array, a switch
core, digital control logic, and full-scale output current control.
The DAC full-scale output current (I
The output currents from the IOUT1P/IOUT2P and IOUT1N/
IOUT2N pins are complementary, meaning that the sum of the
two currents always equals the full-scale current of the DAC.
The digital input code to the DAC determines the effective
differential current delivered to the load.
The DAC has a 1.2 V band gap reference with an output imped-
ance of 5 kΩ. The reference output voltage appears on the REFIO
pin. When using the internal reference, decouple the REFIO pin
to AVSS with a 0.1 µF capacitor. Use the internal reference only for
external circuits that draw dc currents of 2 µA or less. For dynamic
loads or static loads greater than 2 µA, buffer the REFIO pin. If
desired, the internal reference can be overdriven by applying an
external reference (from 1.10 V to 1.30 V) to the REFIO pin.
A 10 kΩ external resistor, R
FSADJ pin to AVSS. This resistor, along with the reference
control amplifier, sets up the correct internal bias currents for
the DAC. Because the full-scale current is inversely proportional
to this resistor, the tolerance of R
output amplitude.
The full-scale current equation, where the DAC gain is set individ-
ually for the I and Q DACs in Register 0x40 and Register 0x44,
respectively, is as follows:
For the nominal values of V
DAC gain (512), the full-scale current of the DAC is typically
20.16 mA. The DAC full-scale current can be adjusted from
8.64 mA to 31.68 mA by setting the DAC gain parameter, as
shown in Figure 51.
0.1µF
I
FS
10kΩ
R
=
SET
FSADJ
REFIO
V
R
Figure 50. Simplified Block Diagram of DAC Core
REF
SET
×



72
1.2V
5kΩ
+



16
3
SET
REF
Q DAC FS ADJUST
I DAC FS ADJUST
×
, must be connected from the
REGISTER 0x40
REGISTER 0x44
(1.2 V), R
DAC gain
CURRENT
SCALING
SET
is reflected in the full-scale
FS
) is nominally 20 mA.
SET






(10 kΩ), and
Q DAC
I DAC
IOUT1P
IOUT1N
IOUT2N
IOUT2P
Rev. A | Page 39 of 56
Transmit DAC Transfer Function
The output currents from the IOUT1P/IOUT2P and IOUT1N/
IOUT2N pins are complementary, meaning that the sum of the
two currents always equals the full-scale current of the DAC. The
digital input code to the DAC determines the effective differential
current delivered to the load. IOUT1P/IOUT2P provide maxi-
mum output current when all bits are high. The output currents
vs. DACCODE for the DAC outputs are expressed as
where DACCODE = 0 to 2
Transmit DAC Output Configurations
The optimum noise and distortion performance of the AD9146
is realized when it is configured for differential operation. The
common-mode error sources of the DAC outputs are significantly
reduced by the common-mode rejection of a transformer or
differential amplifier. These common-mode error sources include
even-order distortion products and noise. The enhancement in
distortion performance becomes more significant as the frequency
content of the reconstructed waveform increases and/or its ampli-
tude increases. This is due to the first-order cancellation of various
dynamic common-mode distortion mechanisms, digital feed-
through, and noise.
I
I
OUTxP
OUTxN
35
30
25
20
15
10
5
0
0
Figure 51. DAC Full-Scale Current vs. DAC Gain Code
=
=

 
I
DACCODE
FS
−
200
2
I
OUTxP
N
N
DAC GAIN CODE

 
400
− 1.
×
I
FS
600
800
AD9146
1000
(1)
(2)