ST72361AR9-Auto STMicroelectronics, ST72361AR9-Auto Datasheet - Page 151

• Manufacturer Part Number: ST72361AR9-Auto
• Description: 8-bit MCU for automotive with K Flash, 10-bit ADC, 5 Timers, SPI, 2x LINSCI
• Manufacturer: STMicroelectronics

Specifications of ST72361AR9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

ST72361xx-Auto
14.6
Note:
Caution:
Figure 76. Single master / multiple slave configuration
Low power modes
Table 56.
Using the SPI to wake up the device from halt mode
In slave configuration, the SPI is able to wake up the device from HALT mode through a
SPIF interrupt. The data received is subsequently read from the SPIDR register when the
software is running (interrupt vector fetch). If multiple data transfers have been performed
before software clears the SPIF bit, then the OVR bit is set by hardware.
When waking up from HALT mode, if the SPI remains in Slave mode, it is recommended to
perform an extra communications cycle to bring the SPI from HALT mode state to normal
state. If the SPI exits from Slave mode, it returns to normal state immediately.
The SPI can wake up the device from HALT mode only if the Slave Select signal (external
SS pin or the SSI bit in the SPICSR register) is low when the device enters HALT mode. So,
if Slave selection is configured as external (see
master drives a low level on the SS pin when the slave enters HALT mode.
Mode
WAIT
HALT
5V
Effect of low power modes on SPI
MOSI
SCK
SS
SCK
MOSI
Master
Device
No effect on SPI.
SPI interrupt events cause the device to exit from WAIT mode.
SPI registers are frozen.
In HALT mode, the SPI is inactive. SPI operation resumes when the device is
woken up by an interrupt with “exit from HALT mode” capability. The data
received is subsequently read from the SPIDR register when the software is
running (interrupt vector fetching). If several data are received before the wake-
up event, then an overrun error is generated. This error can be detected after
the fetch of the interrupt routine that woke up the Device.
Device
Slave
MISO
MISO
SS
Doc ID 12468 Rev 3
MOSI
SCK
Device
Slave
MISO
SS
Slave select
Description
MOSI
SCK
Device
Slave
Serial peripheral interface (SPI)
MISO
management), make sure the
SS
MOSI
SCK
Device
Slave
MISO
SS
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