ST72361AR9-Auto STMicroelectronics, ST72361AR9-Auto Datasheet - Page 94

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ST72361AR9-Auto

Manufacturer Part Number
ST72361AR9-Auto
Description
8-bit MCU for automotive with K Flash, 10-bit ADC, 5 Timers, SPI, 2x LINSCI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72361AR9-Auto

Hdflash Endurance
100 cycles, data retention 20 years at 55 °C
5 Power Saving Modes
halt, auto wake up from halt, active halt, wait and slow
PWM auto-reload timer (ART)
11.2.6
11.2.7
Caution:
11.2.8
94/279
Figure 42. PWM signal from 0% to 100% duty cycle
Output compare and Time base interrupt
On overflow, the OVF flag of the ARTCSR register is set and an overflow interrupt request is
generated if the overflow interrupt enable bit, OIE, in the ARTCSR register, is set. The OVF
flag must be reset by the user software. This interrupt can be used as a time base in the
application.
External clock and event detector mode
Using the f
external clock event detector. In this mode, the ARTARR register is used to select the
n
n
The external clock function is not available in HALT mode. If HALT mode is used in the
application, prior to executing the HALT instruction, the counter must be disabled by clearing
the TCE bit in the ARTCSR register to avoid spurious counter increments.
Figure 43. External event detector example (3 counts)
Input capture function
Input Capture mode allows the measurement of external signal pulse widths through
ARTICRx registers.
EVENT
EVENT
number of events to be counted before setting the OVF flag.
= 256 - ARTARR
f
EXT
EXT
= f
COUNTER
COUNTER
external prescaler input clock, the auto-reload timer can be used as an
OCRx=FCh
OCRx=FDh
OCRx=FEh
OCRx=FFh
COUNTER
OVF
f
COUNTER
FDh
FDh
FEh
Doc ID 12468 Rev 3
FEh
ARTARR
= FDh
FFh
INTERRUPT
IF OIE = 1
ARTARR
= FDh
FFh
FDh
FDh
ARTCSR READ
FEh
FEh
FFh
INTERRUPT
IF OIE = 1
FFh
FDh
FDh
ARTCSR READ
ST72361xx-Auto
FEh
t
t

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