ST72361AR9-Auto STMicroelectronics, ST72361AR9-Auto Datasheet - Page 246
![no-image](/images/manufacturer_photos/0/6/637/stmicroelectronics_sml.jpg)
ST72361AR9-Auto
Manufacturer Part Number
ST72361AR9-Auto
Description
8-bit MCU for automotive with K Flash, 10-bit ADC, 5 Timers, SPI, 2x LINSCI
Manufacturer
STMicroelectronics
Datasheet
1.ST72361AR9-AUTO.pdf
(279 pages)
Specifications of ST72361AR9-Auto
Hdflash Endurance
100 cycles, data retention 20 years at 55 °C
5 Power Saving Modes
halt, auto wake up from halt, active halt, wait and slow
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Electrical characteristics
Note:
246/279
RESET circuit design recommendations
The reset network protects the device against parasitic resets. The output of the external
reset circuit must have an open-drain output to drive the ST7 reset pad. Otherwise the
device can be damaged when the ST7 generates an internal reset (LVD or watchdog).
Whatever the reset source is (internal or external), the user must ensure that the level on the
RESET pin can go below the V
RESET
Because the reset circuit is designed to allow the internal RESET to be output in the RESET
pin, the user must ensure that the current sunk on the RESET pin (by an external pull-up for
example) is less than the absolute maximum value specified for I
Section 20.2.2: Current
RESET pin protection when LVD is disabled
Figure 112. RESET pin protection when LVD is disabled
RESET pin protection when LVD is enabled
Figure 113. RESET pin protection when LVD is enabled
When the LVD is enabled, it is mandatory not to connect a pull-up resistor. A 10nF pull-down
capacitor is recommended to filter noise on the reset line.
In case a capacitive power supply is used, it is recommended to connect a 1 M
resistor to the RESET pin to discharge any residual voltage induced by this capacitive power
supply (this will add 5 µA to the power consumption of the MCU).
EXTERNAL
Required
EXTERNAL
RESET
CIRCUIT
RESET
USER
pin. Otherwise the reset will not be taken into account internally.
Recommended
0.01µF
characteristics.
0.01µF
1M
Optional
(see note )
V
Doc ID 12468 Rev 3
DD
IL
4.7k
max. level specified in
V
DD
V
DD
R
ON
R
Filter
ON
Filter
GENERATOR
Section 20.10.1: Asynchronous
GENERATOR
PULSE
PULSE
INJ(RESET)
ST72361xx-Auto
INTERNAL
RESET
in
WATCHDOG
INTERNAL
RESET
LVD RESET
WATCHDOG
ST72XXX
ST72XXX
pull-down
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