ST72361AR9-Auto STMicroelectronics, ST72361AR9-Auto Datasheet - Page 3
ST72361AR9-Auto
Manufacturer Part Number
ST72361AR9-Auto
Description
8-bit MCU for automotive with K Flash, 10-bit ADC, 5 Timers, SPI, 2x LINSCI
Manufacturer
STMicroelectronics
Datasheet
1.ST72361AR9-AUTO.pdf
(279 pages)
Specifications of ST72361AR9-Auto
Hdflash Endurance
100 cycles, data retention 20 years at 55 °C
5 Power Saving Modes
halt, auto wake up from halt, active halt, wait and slow
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ST72361xx-Auto
6
7
8
5.6
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
6.1
6.2
6.3
6.4
6.5
6.6
Power saving modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
7.1
7.2
7.3
7.4
7.5
7.6
I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
8.1
8.2
5.5.2
5.5.3
5.5.4
5.5.5
System integrity management (SI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
5.6.1
5.6.2
5.6.3
5.6.4
5.6.5
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Masking and processing flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Interrupts and low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Concurrent & nested management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Interrupt register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
6.5.1
6.5.2
External interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
6.6.1
6.6.2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Slow mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Wait mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Active halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Auto wake-up from halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
7.6.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
8.2.1
Asynchronous external RESET pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
External power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Internal low voltage detector (LVD) reset . . . . . . . . . . . . . . . . . . . . . . . . 42
Internal watchdog reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Low voltage detector (LVD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Auxiliary voltage detector (AVD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
CPU CC register interrupt bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Interrupt software priority registers (ISPRX) . . . . . . . . . . . . . . . . . . . . . 53
I/O port interrupt sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Input modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Doc ID 12468 Rev 3
Contents
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