TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 364
TMPM364F10FG
Manufacturer Part Number
TMPM364F10FG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM364F10FG.pdf
(838 pages)
Specifications of TMPM364F10FG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
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11.4
Registers
11.4.5
x=0 to 2, 4 to F
31-7
6
5
4-3
2
1-0
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
Bit
−
−
TBCP
TBCPM[1:0]
TBCLE
TBCLK[1:0]
Bit Symbol
TBxMOD (Mode register)
Note:TMRB0, 3, 4, 8 and A does not have TBxIN0 input and TBxIN1 input.
31
23
15
0
0
0
7
0
-
-
-
-
R
R/W
W
R/W
R/W
R/W
Type
30
22
14
0
0
0
6
0
-
-
-
-
Read as "0".
Write as "0".
Capture control by software
0: Capture by software
1: Don’t care
When "0" is written, the capture register 0 (TBxCP0) takes count value.
Read as "1".
Capture timing
00: Disable
01: TBxIN0↑ TBxIN1↑
Takes count values into capture register 0 (TBxCP0) upon rising of TBxIN0 pin input.
Takes count values into capture register 1 (TBxCP1) upon rising of TBxIN1 pin input.
10: TBxIN0↑ TBxIN0↓
Takes count values into capture register 0 (TBxCP0) upon rising of TBxIN0 pin input.
Takes count values into capture register 1 (TBxCP1) upon falling of TBxIN0 pin input.
11: TBxOUT↑ TBxOUT↓
Takes count values into capture register 0 (TBxCP0) upon rising of 16-bit timer match output (TBxOUT)
and into capture register 1 (TBxCP1) upon falling of TBxOUT.
(TMRB1 to 3: TB4OUT , TMRB5 to 7: TB0OUT , TMRB9 to B: TBCOUT , TMRBD to F: TB8OUT)
Up-counter control
0: Disables clearing of the up-counter.
1: Enables clearing of the up-counter.
Clears and controls the up-counter.
When "0" is written, it disables clearing of the up-counter. When "1" is written, it clears up counter when
there is a match with Timer Regsiter1 (TBxRG1).
Selects the TMRBx source clock.
00: TBxIN0 pin input
01: φT1
10: φT4
11: φT16
TBCP
29
21
13
0
0
0
5
1
-
-
-
Page 338
28
20
12
0
0
0
4
0
-
-
-
TBCPM
27
19
11
Function
0
0
0
3
0
-
-
-
TBCLE
26
18
10
0
0
0
2
0
-
-
-
25
17
0
0
9
0
1
0
-
-
-
TMPM364F10FG
TBCLK
24
16
0
0
8
0
0
0
-
-
-
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