TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 651
TMPM364F10FG
Manufacturer Part Number
TMPM364F10FG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM364F10FG.pdf
(838 pages)
Specifications of TMPM364F10FG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
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18.6.17
31-14
13-0
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
Bit
HC should start processing the periodic list
−
PS[13:0]
The HcPeriodicStart register has a 14-bit programmable value which determines the earliest time when
Bit Symbol
HcPeriodicStart Register
31
23
15
7
0
-
-
-
−
R/W
(HCD)
Type
30
22
14
6
0
−
R
-
-
-
Type
(HC)
Reserved
Filed name:Periodic Start
After a hardware reset, this field is cleared. This is then set by HCD during the HC initialization.
The value is calculated roughly as 10% off from HcFmInterval. A typical value will be 3E67h.
When HcFmRemaining reaches to the value specified, processing of the periodic lists will have pri-
ority over Control/Bulk processing. HC will therefore start processing the Interrupt list after complet-
ing the current Control or Bulk transaction that is in progress.
29
21
13
0
5
0
-
-
Page 625
28
20
12
0
4
0
-
-
PS
27
19
11
0
3
0
-
-
Function
PS
26
18
10
0
2
0
-
-
25
17
9
0
1
0
-
-
TMPM364F10FG
24
16
8
0
0
0
-
-
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