TMPM364F10FG Toshiba, TMPM364F10FG Datasheet - Page 759
TMPM364F10FG
Manufacturer Part Number
TMPM364F10FG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM364F10FG.pdf
(838 pages)
Specifications of TMPM364F10FG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
144
Package
LQFP(20x20)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
5
Uart/sio (ch)
12
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
16
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
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24.2.6
same configuration is applied to a communication format on a programming controller to execute the on-
board programming. Both UART (asynchronous) and I/O Interface (synchronous) modes are supported. The
communication formats are shown below.
In Single Boot mode, an SIO channel is used for communications with a programming controller. The
Interface specification
・ UART communication
・ I/O Interface mode
Table 24-3 Required Pin Connections
Power supply pins
Mode-setting pin
Communication
Communication channel : SIO channel 4
Serial transfer mode : UART (asynchronous), half -duplex, LSB first
Data length : 8 bits
Parity bit : None
STOP bit : 1 bit
Baud rate : Arbitrary baud rate
Communication channel : SIO channel 4
Serial transfer mode : I/O interface mode, full -duplex, LSB first
Synchronization clock (SCLK4) : Input mode
Handshaking signal : PN3 configured as an output mode
Baud rate : Arbitrary baud rate
Reset pin
pin
Pin
SCLK4 (PN2)
TXD4 (PN0)
RXD4 (PN1)
BOOT (PI0)
DVDD3B
DVDD3A
RVDD3
AVDD3
RESET
AVSS
DVSS
PN3
Page 733
UART
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
×
×
Interface
I/O Interface Mode
ο (Output mode)
ο (Input mode)
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
TMPM364F10FG
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