XC3S100E Xilinx Corp., XC3S100E Datasheet - Page 107

• Manufacturer Part Number: XC3S100E
• Description: Spartan-3e Fpga Family Complete Data Sheet
• Manufacturer: Xilinx Corp.

DS312-2 (v3.6) May 29, 2007
Product Specification
R
instruction
JPROG
Load
Figure 68: Boundary-Scan Configuration Flow Diagram
No
Yes
and V
(JTAG port becomes
Load configuration
and V
INIT_B = High?
Load JSTART
(Clock five 1's
Load CFG_IN
Reconfigure?
Synchronous
configuration
data frames
User mode
V
instruction
Power-On
Yes
instruction
mode pins
TAP reset
sequence
CCO
Yes
Yes
available)
on TMS)
Start-Up
correct?
CCINT
memory
Sample
CCAUX
Clear
CRC
Bank 2 > 1V
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>1V
> 2V
No
No
No
INIT_B goes Low.
Abort Start-Up
Yes
Set PROG_B Low
after Power-On
PROG_B = Low
DS312-2_59_051706
No
Functional Description
107