XC3S100E Xilinx Corp., XC3S100E Datasheet - Page 24

• Manufacturer Part Number: XC3S100E
• Description: Spartan-3e Fpga Family Complete Data Sheet
• Manufacturer: Xilinx Corp.

Functional Description
Slice Location Designations
The Xilinx development software designates the location of
a slice according to its X and Y coordinates, starting in the
bottom left corner, as shown in
lowed by a number identifies columns of slices, increment-
ing from the left side of the die to the right. The letter ‘Y’
followed by a number identifies the position of each slice in
a pair as well as indicating the CLB row, incrementing from
the bottom of the die.
the lower left-hand corner of the die. The SLICEM always
has an even ‘X’ number, and the SLICEL always has an odd
‘X’ number.
24
SRL16
SRL16
RAM16
RAM16
LUT4 (G)
LUT4 (F)
Figure 16
Switch
Matrix
Carry
Carry
Arithmetic Logic
SLICEM
F5MUX
FiMUX
Figure
shows the CLB located in
SHIFTOUT
Figure 16: Arrangement of Slices within the CLB
SHIFTIN
(Logic or Distributed RAM
Left-Hand SLICEM
14. The letter ‘X’ fol-
or Shift Register)
CLB
Figure 17: Resources in a Slice
Register
Register
SLICE
SLICE
X0Y1
X0Y0
COUT
CIN
www.xilinx.com
Slice Overview
A slice includes two LUT function generators and two stor-
age elements, along with additional logic, as shown in
Figure
Both SLICEM and SLICEL have the following elements in
common to provide logic, arithmetic, and ROM functions:
•
•
•
•
Right-Hand SLICEL
(Logic Only)
Two 4-input LUT function generators, F and G
Two storage elements
Two wide-function multiplexers, F5MUX and FiMUX
Carry and arithmetic logic
SLICE
SLICE
X1Y1
X1Y0
17.
COUT
LUT4 (G)
LUT4 (F)
CIN
Carry
Carry
Arithmetic Logic
DS099-2_05_082104
F5MUX
FiMUX
to Neighbors
SLICEL
Interconnect
DS312-2 (v3.6) May 29, 2007
Product Specification
Register
Register
DS312-2_13_020905
R