MT9VDDT6472HY-40B Micron Semiconductor Products, MT9VDDT6472HY-40B Datasheet - Page 15
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MT9VDDT6472HY-40B
Manufacturer Part Number
MT9VDDT6472HY-40B
Description
256mb, 512mb, 1gb X72, Ecc, Sr 200-pin Ddr Sodimm
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT9VDDT6472HY-40B.pdf
(28 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT9VDDT6472HY-40BJ1
Manufacturer:
MICRON
Quantity:
2 000
Table 14: I
DDR SDRAM components only
Notes: 1–5, 8, 10, 12, 46; notes appear on pages 18–20; 0°C ≤ T
Table 15: Capacitance
Note: 11; notes appear on pages 18–20
pdf: 09005aef811d6080, source: 09005aef806e057b
DDA9C32_64_128x72HG.fm - Rev. B 06/05 EN
PARAMETER/CONDITION
OPERATING CURRENT: One device bank; Active-Precharge;
t
clock cyle; Address and control inputs changing once every two clock cycles
OPERATING CURRENT: One device bank; Active -Read Precharge; Burst = 4;
t
changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All device banks idle; Power-
down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
CKE = HIGH; Address and other control inputs changing once per clock cycle.
V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank active; Power-
down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device bank;
Active-Precharge;
changing twice per clock cycle; Address and other control inputs changing
once per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One bank active;
Address and control inputs changing once per clock cycle;
I
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One device bank
active; Address and control inputs changing once per clock cycle;
(MIN); DQ, DM, and DQS inputs changing twice per clock cycle
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE ≤ 0.2V
OPERATING CURRENT: Four device bank interleaving READs (BL = 4) with auto
precharge,
change only during Active READ, or WRITE commands
PARAMETER
Input/Output Capacitance: DQ, DQS, DM
Input Capacitance: Command and Address, S#, CKE
Input Capacitance:CK, CK#
RC =
RC =
OUT
IN
= V
= 0mA
t
t
RC (MIN);
RC (MIN);
REF
for DQ, DQS, and DM
t
RC =
t
t
CK =
CK =
DD
t
t
CK =
CK =
t
RC (MIN);
t
RC =
t
t
CK (MIN); CKE = (LOW)
CK (MIN); CKE = LOW
Specifications and Conditions – 1GB
t
t
CK (MIN); DQ, DM and DQS inputs changing once per
CK (MIN); I
t
RAS (MAX);
t
CK =
t
OUT
CK (MIN); Address and control inputs
t
CK =
= 0mA; Address and control inputs
t
CK (MIN); DQ, DM andDQS inputs
t
t
REFC =
REFC = 7.8125µs
t
CK =
t
t
RFC (MIN)
256MB, 512MB, 1GB (x72, ECC, SR)
15
CK =
A
≤ +70°C; V
t
CK (MIN);
t
t
CK =
CK MIN;
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
CK
DD
= V
SYMBOL
SYMBOL
DD
I
I
I
I
I
I
C
I
C
C
DD4W
DD3N
DD5A
I
I
DD2P
DD3P
DD4R
I
I
I
DD2F
DD0
DD1
DD5
DD6
DD7
IO
I1
I2
200-PIN DDR SODIMM
Q = +2.6V ±0.1V
MAX
-40B
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
©2005 Micron Technology, Inc. All rights reserved.
MIN
18
4
6
MAX
27
UNITS NOTES
5
9
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
UNITS
21, 27,
20, 40
20, 40
21,27,
20, 40
20, 42
23, 42
20, 41
pF
pF
pF
42
43
42
20
9