MT9VDDT6472HY-40B Micron Semiconductor Products, MT9VDDT6472HY-40B Datasheet - Page 16

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MT9VDDT6472HY-40B

Manufacturer Part Number
MT9VDDT6472HY-40B
Description
256mb, 512mb, 1gb X72, Ecc, Sr 200-pin Ddr Sodimm
Manufacturer
Micron Semiconductor Products
Datasheet

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Table 16: DDR SDRAM Component Electrical Characteristics and
Notes: 1–5, 12-15, 28; notes appear on pages 18–20; 0°C ≤ T
pdf: 09005aef811d6080, source: 09005aef806e057b
DDA9C32_64_128x72HG.fm - Rev. B 06/05 EN
AC CHARACTERISTICS
PARAMETER
Access window of DQs from CK/CK#
CK high-level width
CK low-level width
Clock cycle time
DQ and DM input hold time relative to DQS
DQ and DM input setup time relative to DQS
DQ and DM input pulse width (for each input)
Access window of DQS from CK/CK#
DQS input high pulse width
DQS input low pulse width
DQS-DQ skew, DQS to last DQ valid, per group, per access
Write command to first DQS latching transition
DQS falling edge to CK rising - setup time
DQS falling edge from CK rising - hold time
Half clock period
Data-out high-impedance window from CK/CK#
Data-out low-impedance window from CK/CK#
Address and control input hold time (1 V/ns)
Address and control input setup time (1 V/ns)
Address and control input hold time (0.5 V/ns)
Address and control input setup time (0.5 V/ns)
Address and Control input pulse width (for each input)
LOAD MODE REGISTER command cycle time
DQ-DQS hold, DQS to first DQ to go non-valid, per access
Data hold skew factor
ACTIVE to PRECHARGE command
ACTIVE to READ with Auto precharge command
ACTIVE to ACTIVE/AUTO REFRESH command period
AUTO REFRESH command period
ACTIVE to READ or WRITE delay
PRECHARGE command period
DQS read preamble
DQS read postamble
ACTIVE bank a to ACTIVE bank b command
DQS write preamble
DQS write preamble setup time
Recommended AC Operating Conditions
CL = 3
CL = 2.5
CL = 2
256MB, 512MB
1GB
A
256MB, 512MB, 1GB (x72, ECC, SR)
16
≤ +70°C; V
SYMBOL
t
t
t
CK (2.5)
t
t
t
t
t
t
DQSCK
WPRES
t
t
t
CK (3)
CK (2)
DQSQ
t
t
DQSH
WPRE
DIPW
t
t
t
t
DQSL
DQSS
t
t
t
t
MRD
t
RPRE
RPST
t
t
t
t
DSH
t
t
t
t
QHS
RAP
RCD
RRD
t
IPW
RAS
t
t
t
DSS
t
t
t
RFC
QH
DH
AC
CH
HP
HZ
IH
IH
CL
DS
IS
IS
RC
RP
LZ
F
S
F
S
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD
t
HP -
= V
-0.70
MIN
0.45
0.45
1.75
0.35
0.35
0.72
2.20
0.25
-0.7
-0.6
120
7.5
0.4
0.4
0.2
0.2
0.6
0.6
0.6
0.6
0.9
0.4
40
15
55
70
15
15
10
DD
5
6
2
0
t
QHS
Q = +2.6V ±0.1V
t
CH,
-40B
200-PIN DDR SODIMM
t
CL
70,000
MAX
+0.70
+0.7
0.55
0.55
+0.6
0.40
1.28
0.50
7.5
1.1
0.6
13
13
©2005 Micron Technology, Inc. All rights reserved.
UNITS
t
t
t
t
t
t
t
t
t
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
NOTES
39, 44
38, 43
39, 44
22, 26
22, 26
16, 36
16, 36
17, 19
26
22
29
30
25
25
12
12
12
12
42
37
37
22

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