upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 207

• Manufacturer Part Number: upd78f0103hmca1-5a4-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

(2) Asynchronous serial interface reception error status register 0 (ASIS0)
Address: FF73H After reset: 00H R
Cautions 1. The operation of the PE0 bit differs depending on the set values of the PS01 and PS00 bits of
Symbol
ASIS0
This register indicates an error status on completion of reception by serial interface UART0. It includes three
error flag bits (PE0, FE0, OVE0).
This register is read-only by an 8-bit memory manipulation instruction.
RESET input, bit 7 (POWER0) = 0, or bit 5 (RXE0) of ASIM0 = 0 clears this register to 00H. 00H is read when
this register is read.
Figure 11-3. Format of Asynchronous Serial Interface Reception Error Status Register 0 (ASIS0)
2. Only the first bit of the receive data is checked as the stop bit, regardless of the number of
3. If an overrun error occurs, the next receive data is not written to receive buffer register 0
4. If data is read from ASIS0, a wait cycle is generated. For details, see CHAPTER 27 CAUTIONS
OVE0
asynchronous serial interface operation mode register 0 (ASIM0).
stop bits.
(RXB0) but discarded.
FOR WAIT.
PE0
FE0
7
0
0
1
0
1
0
1
CHAPTER 11 SERIAL INTERFACE UART0 (
If POWER0 = 0 and RXE0 = 0, or if the ASIS0 register is read.
If the parity of transmit data does not match the parity bit on completion of reception.
If POWER0 = 0 and RXE0 = 0, or if the ASIS0 register is read.
If the stop bit is not detected on completion of reception.
If POWER0 = 0 and RXE0 = 0, or if the ASIS0 register is read.
If receive data is set to the RXB0 register and the next reception operation is completed before the
data is read.
6
0
5
0
User’s Manual U16846EJ3V0UD
Status flag indicating framing error
Status flag indicating overrun error
Status flag indicating parity error
4
0
PD78F0102H AND 78F0103H ONLY)
3
0
PE0
2
FE0
1
OVE0
0
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