upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 293

• Manufacturer Part Number: upd78f0103hmca1-5a4-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

15.1.2 Registers controlling standby function
(1) Oscillation stabilization time counter status register (OSTC)
The standby function is controlled by the following two registers.
• Oscillation stabilization time counter status register (OSTC)
• Oscillation stabilization time select register (OSTS)
Remark For the registers that start, stop, or select the clock, see CHAPTER 5 CLOCK GENERATOR.
This is the status register of the high-speed system clock oscillation stabilization time counter. If the internal
oscillation clock is used as the CPU clock, the high-speed system clock oscillation stabilization time can be
checked.
OSTC can be read by a 1-bit or 8-bit memory manipulation instruction.
When a reset is released (reset by RESET input, POC, LVI, clock monitor, and WDT), the STOP instruction, or
MSTOP (bit 7 of MOC register) = 1 clears OSTC to 00H.
Caution Waiting for the oscillation stabilization time is not required when the external RC oscillation
Address: FFA3H
Symbol
OSTC
Figure 15-1. Format of Oscillation Stabilization Time Counter Status Register (OSTC)
clock is selected as the high-speed system clock by the option byte. Therefore, the CPU clock
can be switched without reading the OSTC value.
Cautions 1. After the above time has elapsed, the bits are set to 1 in order from MOST11 and
Remark f
MOST11
7
0
1
1
1
1
1
After reset: 00H
2. If the STOP mode is entered and then released while the internal oscillation
3. The wait time when STOP mode is released does not include the time after
XP
: High-speed system clock oscillation frequency
remain 1.
MOST13
clock is being used as the CPU clock, set the oscillation stabilization time as
follows.
The oscillation stabilization time counter counts only during the oscillation
stabilization time set by OSTS. Therefore, note that only the statuses during the
oscillation stabilization time set by OSTS are set to OSTC after STOP mode has
been released.
STOP mode release until clock oscillation starts (“a” below) regardless of
whether STOP mode is released by RESET input or interrupt generation.
• Desired OSTC oscillation stabilization time ≤ Oscillation stabilization time
6
0
0
1
1
1
1
set by OSTS
X1 pin voltage
waveform
CHAPTER 15 STANDBY FUNCTION
R
MOST14
User’s Manual U16846EJ3V0UD
5
0
0
0
1
1
1
STOP mode release
MOST11
MOST15
4
0
0
0
1
1
a
MOST16
MOST13
3
0
0
0
0
1
2
2
2
2
2
11
13
14
15
16
MOST14
Oscillation stabilization time status
/f
/f
/f
/f
/f
XP
XP
XP
XP
XP
2
min. 204.8
min. 819.2
min. 1.64 ms min. 1.02 ms min.
min. 3.27 ms min. 2.04 ms min.
min. 6.55 ms min. 4.09 ms min.
f
XP
MOST15
= 10 MHz f
µ
µ
1
s min. 128
s min. 512
XP
MOST16
= 16 MHz
µ
µ
0
s min.
s min.
293