upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 210

• Manufacturer Part Number: upd78f0103hmca1-5a4-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

11.4 Operation of Serial Interface UART0
11.4.1 Operation stop mode
pins can be used as ordinary port pins in this mode. To set the operation stop mode, clear bits 7, 6, and 5 (POWER0,
TXE0, and RXE0) of ASIM0 to 0.
(1) Register used
210
Address: FF70H After reset: 01H R/W
Serial interface UART0 has the following two modes.
• Operation stop mode
• Asynchronous serial interface (UART) mode
In this mode, serial communication cannot be executed, thus reducing the power consumption. In addition, the
Notes 1.
Caution Clear POWER0 to 0 after clearing TXE0 and RXE0 to 0 to set the operation stop mode.
Remark To use the RxD0/SI10/P11 and TxD0/SCK10/P10 pins as general-purpose port pins, see CHAPTER 4
Symbol
ASIM0
The operation stop mode is set by asynchronous serial interface operation mode register 0 (ASIM0).
ASIM0 can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets this register to 01H.
2.
To start the operation, set POWER0 to 1, and then set TXE0 and RXE0 to 1.
PORT FUNCTIONS.
The input from the R
Asynchronous serial interface reception error status register 0 (ASIS0), transmit shift register 0 (TXS0),
and receive buffer register 0 (RXB0) are reset.
POWER0
POWER0
RXE0
TXE0
0
<7>
Note 1
0
0
CHAPTER 11 SERIAL INTERFACE UART0 (
Disables operation of the internal operation clock (fixes the clock to low level) and asynchronously
resets the internal circuit
Disables transmission (synchronously resets the transmission circuit).
Disables reception (synchronously resets the reception circuit).
TXE0
<6>
X
D0 pin is fixed to high level when POWER0 = 0.
RXE0
<5>
User’s Manual U16846EJ3V0UD
Enables/disables operation of internal operation clock
Note 2
.
PS01
4
Enables/disables transmission
Enables/disables reception
PD78F0102H AND 78F0103H ONLY)
PS00
3
CL0
2
SL0
1
0
1