upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 428

• Manufacturer Part Number: upd78f0103hmca1-5a4-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

428
Serial
interface
UART0
Serial
interface
UART6
Function
Details of Function
UART reception
Error of baud rate
Permissible baud
rate range during
reception
UART mode
TXB6: Transmit
buffer register 6
ASIM6:
Asynchronous
serial interface
operation mode
register 6
ASIS6:
Asynchronous
serial interface
reception error
status register 6
ASIF6:
Asynchronous
serial interface
transmission
status register 6
Be sure to read asynchronous serial interface reception error status register 0 (ASIS0)
before reading RXB0.
Keep the baud rate error during transmission to within the permissible error range at the
reception destination.
Make sure that the baud rate error during reception satisfies the range shown in (4)
Permissible baud rate range during reception.
Make sure that the baud rate error during reception is within the permissible error range, by
using the calculation expression shown below.
The T
side. To use this function, the reception side must be ready for reception of inverted data.
If clock supply to serial interface UART6 is not stopped (e.g., in the HALT mode), normal
operation continues. If clock supply to serial interface UART6 is stopped (e.g., in the STOP
mode), each register stops operating, and holds the value immediately before clock supply
was stopped. The T
stopped and outputs it. However, the operation is not guaranteed after clock supply is
resumed. Therefore, reset the circuit so that POWER6 = 0, RXE6 = 0, and TXE6 = 0.
If data is continuously transmitted, the communication timing from the stop bit to the next
start bit is extended two operating clocks of the macro. However, this does not affect the
result of communication because the reception side initializes the timing when it has
detected a start bit. Do not use the continuous transmission function if the interface is
incorporated in LIN.
Do not write data to TXB6 when bit 1 (TXBF6) of asynchronous serial interface transmission
status register 6 (ASIF6) is 1.
Do not refresh (write the same value to) TXB6 by software during a communication
operation (when bit 7 (POWER6) and bit 6 (TXE6) of asynchronous serial interface
operation mode register 6 (ASIM6) are 1 or when bit 7 (POWER6) and bit 5 (RXE6) of
ASIM6 are 1).
At startup, set POWER6 to 1 and then set TXE6 to 1. To stop the operation, clear TXE6 to
0 and then clear POWER6 to 0.
At startup, set POWER6 to 1 and then set RXE6 to 1. To stop the operation, clear RXE6 to
0 and then clear POWER6 to 0.
Set POWER6 to 1 and then set RXE6 to 1 while a high level is input to the RxD6 pin. If
POWER6 is set to 1 and RXE6 is set to 1 while a low level is input, reception is started.
Clear the TXE6 and RXE6 bits to 0 before rewriting the PS61, PS60, and CL6 bits.
Fix the PS61 and PS60 bits to 0 when mounting the device on LIN.
Make sure that TXE6 = 0 when rewriting the SL6 bit. Reception is always performed with
“the number of stop bits = 1”, and therefore, is not affected by the set value of the SL6 bit.
Make sure that RXE6 = 0 when rewriting the ISRM6 bit.
The operation of the PE6 bit differs depending on the set values of the PS61 and PS60 bits
of asynchronous serial interface operation mode register 6 (ASIM6).
The first bit of the receive data is checked as the stop bit, regardless of the number of stop
bits.
If an overrun error occurs, the next receive data is not written to receive buffer register 6
(RXB6) but discarded.
If data is read from ASIS6, a wait cycle is generated. For details, see CHAPTER 27
CAUTIONS FOR WAIT.
To transmit data continuously, write the first transmit data (first byte) to the TXB6 register.
Be sure to check that the TXBF6 flag is “0”. If so, write the next transmit data (second byte)
to the TXB6 register. If data is written to the TXB6 register while the TXBF6 flag is “1”, the
transmit data cannot be guaranteed.
To initialize the transmission unit upon completion of continuous transmission, be sure to
check that the TXSF6 flag is “0” after generation of the transmission completion interrupt,
and then execute initialization. If initialization is executed while the TXSF6 flag is “1”, the
transmit data cannot be guaranteed.
X
D6 output inversion function inverts only the transmission side and not the reception
APPENDIX D LIST OF CAUTIONS
User’s Manual U16846EJ3V0UD
X
D6 pin also holds the value immediately before clock supply was
Cautions
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