upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 418
upd78f0103hmca1-5a4-a
Manufacturer Part Number
upd78f0103hmca1-5a4-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
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This appendix lists cautions described in this document.
“Classification (hard/soft)” in table is as follows.
Hard:
Soft:
Pin
configuration
Memory
space
Port function
Internal
oscillator
Main clock
Function
Cautions for microcontroller internal/external hardware
Cautions for software such as register settings or programs
−
Details of Function
IMS: Memory
size switching
register
SFR area:
Special function
register
SP: Stack pointer Since RESET input makes the SP contents undefined, be sure to initialize the SP before
P10, P11, P12
PCC: Processor
clock control
register (PCC)
RCM: Internal
oscillation mode
register
MCM: Main clock
mode register
−
−
Connect the AV
Regardless of the internal memory capacity, the initial values of internal memory size
switching register (IMS) of all products in the 78K0/KB1+ are fixed (IMS = CFH). Therefore,
set the value corresponding to each product as indicated below. In addition, set the
following values to the internal memory size switching register (IMS) when using the
78K0/KB1+ to evaluate the program of a mask ROM version of the 78K0/KB1.
µ
µ
µ
Do not access addresses to which SFRs are not assigned.
use.
To use P10/SCK10 (/TxD0), P11/SI10 (/RxD0), and P12/SO10 as general-purpose ports,
set serial operation mode register 10 (CSIM10) and serial clock selection register 10
(CSIC10) to the default status (00H).
In the case of a 1-bit memory manipulation instruction, although a single bit is manipulated,
the port is accessed as an 8-bit unit. Therefore, on a port with a mixture of input and output
pins, the output latch contents for pins specified as input are undefined, even for bits other
than the manipulated bit.
Be sure to clear bits 3 to 7 to 0.
Make sure that bit 1 (MCS) of the main clock mode register (MCM) is 1 before setting
RSTOP.
When the internal oscillation clock is selected as the clock to be supplied to the CPU, the
divided clock of the internal oscillator output (f
240 kHz (TYP.)).
Operation of the peripheral hardware with the internal oscillation clock cannot be
guaranteed. Therefore, when the internal oscillation clock is selected as the clock supplied
to the CPU, do not use peripheral hardware. In addition, stop the peripheral hardware
before switching the clock supplied to the CPU from the high-speed system clock to the
internal oscillation clock. Note, however, that the following peripheral hardware can be
used when the CPU operates on the internal oscillation clock.
• Watchdog timer
• Clock monitor
• 8-bit timer H1 when f
• Peripheral hardware with an external clock selected as the clock source
PD78F0101H, 780101: 42H
PD78F0102H, 780102: 04H
PD78F0103H, 780103: 06H
APPENDIX D LIST OF CAUTIONS
(Except when the external count clock of TM00 is selected (TI000 valid edge))
User’s Manual U16846EJ3V0UD
SS
pin to V
R
/2
SS
7
is selected as the count clock
.
Cautions
X
) is supplied to the peripheral hardware (f
X
=
p. 17
p. 34
p. 39
p. 44
p. 69
p. 81
p. 84
p. 85
p. 86
Page
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