upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 221

• Manufacturer Part Number: upd78f0103hmca1-5a4-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

Therefore, the maximum receivable baud rate at the transmission destination is as follows.
Similarly, the maximum permissible data frame length can be calculated as follows.
Therefore, the minimum receivable baud rate at the transmission destination is as follows.
The permissible baud rate error between UART0 and the transmission destination can be calculated from the
above minimum and maximum baud rate expressions, as follows.
Remarks 1. The permissible reception error depends on the number of bits in one frame, input clock
10
11
8
16
24
31
Minimum permissible data frame length: FLmin = 11 × FL −
× FLmax = 11 × FL −
Division Ratio (k)
FLmax =
BRmax = (FLmin/11)
BRmin = (FLmax/11)
2. k: Set value of BRGC0
CHAPTER 11 SERIAL INTERFACE UART0 (
frequency, and division ratio (k). The higher the input clock frequency and the higher the division
ratio (k), the higher the permissible reception error.
21k − 2
20k
Table 11-5. Maximum/Minimum Permissible Baud Rate Error
FL × 11
k + 2
2 × k
Maximum Permissible Baud Rate Error
−
−
× FL =
1
1
=
=
21k + 2
21k − 2
22k
20k
21k − 2
+3.53%
+4.14%
+4.34%
+4.44%
2 × k
User’s Manual U16846EJ3V0UD
Brate
Brate
FL
PD78F0102H AND 78F0103H ONLY)
k − 2
2k
× FL =
Minimum Permissible Baud Rate Error
21k + 2
2k
−3.61%
−4.19%
−4.38%
−4.47%
FL
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