upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 292

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upd78f0103hmca1-5a4-a

Manufacturer Part Number
upd78f0103hmca1-5a4-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
(1) HALT mode
(2) STOP mode
set are held. The I/O port output latches and output buffer statuses are also held.
292
In either of these two modes, all the contents of registers, flags and data memory just before the standby mode is
Cautions 1. When shifting to the STOP mode, be sure to stop the peripheral hardware operation before
HALT instruction execution sets the HALT mode. The HALT mode is intended to stop the CPU operation clock. If
the high-speed system clock and internal oscillator are operating before the HALT mode is set, oscillation of the
high-speed system clock and internal oscillation clock continues. In this mode, operating current is not decreased
as much as in the STOP mode. However, the HALT mode is effective for restarting operation immediately upon
interrupt request generation and carrying out intermittent operations.
STOP instruction execution sets the STOP mode. In the STOP mode, the high-speed system clock oscillator
stops, stopping the whole system, thereby considerably reducing the CPU operating current.
Because this mode can be cleared by an interrupt request, it enables intermittent operations to be carried out.
However, because a wait time is required to secure the oscillation stabilization time after the STOP mode is
released, select the HALT mode if it is necessary to start processing immediately upon interrupt request
generation.
2. The following sequence is recommended for operating current reduction of the A/D converter
3. If the internal oscillator is operating before the STOP mode is set, oscillation of the internal
executing STOP instruction.
when the standby function is used: First clear bit 7 (ADCS) and bit 0 (ADCE) of the A/D
converter mode register (ADM) to 0 to stop the A/D conversion operation, and then execute
the HALT or STOP instruction.
oscillation clock cannot be stopped in the STOP mode.
oscillation clock is used as the CPU clock, CPU operation is stopped for 17/f
mode is released.
CHAPTER 15 STANDBY FUNCTION
User’s Manual U16846EJ3V0UD
However, when the internal
R
(s) after STOP

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