upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 312

• Manufacturer Part Number: upd78f0103hmca1-5a4-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

operation. Even if CLME is set to 1 by software during the oscillation stabilization time (reset value of OSTS register
is 05H (2
the high-speed system clock ends. Monitoring is automatically started at the end of the oscillation stabilization time.
312
Internal oscillation clock
Internal oscillation clock
RESET input clears bit 0 (CLME) of the clock monitor mode register (CLM) to 0 and stops the clock monitor
Caution Waiting for the oscillation stabilization time is not required when the external RC oscillation
Internal reset signal
(CLME = 1 is set after RESET input and during high-speed system clock oscillation stabilization time)
Clock monitor status
16
CPU operation
system clock
/f
High-speed
system clock
XP
High-speed
clock is selected as the high-speed system clock by the option byte. Therefore, the CPU clock
can be switched without reading the OSTC value. However, the clock monitor starts operation
after the oscillation stabilization time (OSTS register reset value = 05H (2
)) of the high-speed system clock, monitoring is not performed until the oscillation stabilization time of
(1) When internal reset is executed by oscillation stop of high-speed system clock
CLMRF
CLME
RESET
CLME
Monitoring
operation
Normal
(2) Clock monitor status after RESET input
Figure 17-3. Timing of Clock Monitor (1/4)
Oscillation
Oscillation
stopped
stopped
Reset
CHAPTER 17 CLOCK MONITOR
User’s Manual U16846EJ3V0UD
4 clocks of internal oscillation clock
Clock supply
17 clocks
Monitoring stopped
stopped
Oscillation stabilization time
Set to 1 by software
Normal operation (internal oscillation clock)
stabilization time
Waiting for end
of oscillation
16
/f
XP
)) has elapsed.
Monitoring