ds3104-se Maxim Integrated Products, Inc., ds3104-se Datasheet - Page 103

• Manufacturer Part Number: ds3104-se
• Description: Line Card Timing Ic With Synchronous Ethernet Support
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 6 to 4: Phase Detector 2 Gain, 8kHz (PD2G8K[2:0]). This field specifies the gain of the T0 phase detector 2
with an input clock of 8kHz or less. This value is only used if automatic gain selection is enabled by setting PD2EN
= 1 in the
Bits 2 to 0: Damping Factor (DAMP[2:0]). This field configures the damping factor of the T0 DPLL. Damping
factor is a function of both DAMP[2:0] and the T0 DPLL bandwidth
corresponds to a damping factor of 5. See Section 7.7.4.
The gain peak for each damping factor is shown below:
________________________________________________________________________________________ DS3104-SE
000, 110, and 111 =
DAMPING
FACTOR
001 =
010 =
011 =
100 =
101 =
1.2
2.5
5.0
10
20
T0CR3
Bit 7
—
0
register. See Section 7.7.5.
GAIN PEAK (dB)
d 4Hz
Bit 6
5
5
5
5
5
0
0.06
0.03
0.4
0.2
0.1
T0CR2
T0 Configuration Register 2
6Bh
PD2G8K[2:0]
8Hz
2.5
5
5
5
5
Bit 5
0
{unused values}
18Hz
1.2
2.5
5
5
5
Bit 4
1
35Hz
1.2
2.5
10
10
5
Bit 3
—
0
(T0ABW
_ 70Hz
1.2
2.5
10
20
5
Bit 2
and T0LBW). The default value
0
DAMP[2:0]
Bit 1
1
Bit 0
1
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