ds3104-se Maxim Integrated Products, Inc., ds3104-se Datasheet - Page 126
ds3104-se
Manufacturer Part Number
ds3104-se
Description
Line Card Timing Ic With Synchronous Ethernet Support
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.DS3104-SE.pdf
(135 pages)
- Current page: 126 of 135
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10.4
Table 10-10. SPI Interface Timing
(VDD = 1.8V r10%; VDDIO = 3.3V r5%, T
________________________________________________________________________________________ DS3104-SE
SCLK Frequency
SCLK Cycle Time
CS Setup to First SCLK Edge
CS Hold Time After Last SCLK Edge
SCLK High Time
SCLK Low Time
SDI Data Setup Time
SDI Data Hold Time
SDO Enable Time (High-Impedance to Output Active)
SDO Disable Time (Output Active to High-Impedance)
SDO Data Valid Time
SDO Data Hold Time After Update SCLK Edge
Note 1:
SPI Interface Timing
All timing is specified with 100pF load on all SPI pins.
PARAMETER (Note 1)
A
= -40°C to +85°C) (See
SYMBOL
t
t
t
f
t
t
t
CLKH
t
t
t
CLKL
HDC
t
t
HDO
BUS
CYC
SUC
SUI
HDI
DIS
EN
DV
Figure
MIN
100
10-4.)
15
15
50
50
15
5
0
5
TYP
MAX
25
50
6
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
126
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