ds3104-se Maxim Integrated Products, Inc., ds3104-se Datasheet - Page 84
ds3104-se
Manufacturer Part Number
ds3104-se
Description
Line Card Timing Ic With Synchronous Ethernet Support
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.DS3104-SE.pdf
(135 pages)
- Current page: 84 of 135
- Download datasheet (937Kb)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Interrupt Enable for Frame Sync Input Monitor Alarm (FSMON). This bit is an interrupt enable for the
FSMON bit in the
Bit 6: Interrupt Enable for the T4 DPLL Lock Status Change (T4LOCK). This bit is an interrupt enable for the
T4LOCK bit in the
Bit 4: Interrupt Enable for T4 No Valid Inputs Alarm (T4NOIN). This bit is an interrupt enable for the T4NOIN bit
in the
________________________________________________________________________________________ DS3104-SE
MSR3
0 = Mask the interrupt
1 = Enable the interrupt
0 = Mask the interrupt
1 = Enable the interrupt
0 = Mask the interrupt
1 = Enable the interrupt
register.
FSMON
Bit 7
MSR3
0
MSR3
register.
register.
T4LOCK
Bit 6
0
IER3
Interrupt Enable Register 3
45h
Bit 5
—
0
T4NOIN
Bit 4
0
Bit 3
—
0
Bit 2
—
0
Bit 1
—
0
Bit 0
—
0
84
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