ds3104-se Maxim Integrated Products, Inc., ds3104-se Datasheet - Page 64

• Manufacturer Part Number: ds3104-se
• Description: Line Card Timing Ic With Synchronous Ethernet Support
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 and 5 to 0: Input Clock Valid Status (IC8 and IC[6:1]). Each of these real-time status bits is set to 1 when
the corresponding input clock is valid. An input is valid if it has no active alarms (ACT = 0, LOCK = 0 in the
corresponding
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 6: Holdover Frequency Ready (HORDY). This real-time status bit is set to 1 when the T0 DPLL has a
holdover value that has been averaged over the one-second holdover averaging period. See the related latched
status bit in
Bit 0: Input Clock Valid Status (IC9). This bit has the same behavior as the bits in
________________________________________________________________________________________ DS3104-SE
0 = Invalid
1 = Valid
MSR4
ISR
Bit 7
Bit 7
IC8
—
0
0
and Section 7.7.1.6.
register). See also the
HORDY
Bit 6
Bit 6
—
0
0
VALSR1
Input Clock Valid Status Register 1
0Eh
VALSR2
Input Clock Valid Status Register 2
0Fh
Bit 5
Bit 5
MSR1
IC6
—
0
0
register and Section 7.5.
Bit 4
Bit 4
IC5
—
0
0
Bit 3
Bit 3
IC4
—
0
0
Bit 2
Bit 2
IC3
—
0
0
VALSR1
but for the IC9 clock.
Bit 1
Bit 1
IC2
—
0
0
Bit 0
Bit 0
IC1
IC9
0
0
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