mt48h16m32lfcm-75-it Micron Semiconductor Products, mt48h16m32lfcm-75-it Datasheet - Page 42

• Manufacturer Part Number: mt48h16m32lfcm-75-it
• Description: 512mb 32 Meg X 16, 16 Meg X 32 Mobile Sdram Features
• Manufacturer: Micron Semiconductor Products

Figure 17:
READs
PDF: 09005aef82ea3742/Source: 09005aef82ea3752
sdr_mobile_sdram_cmd_op_timing_dia_fr4.08__4.fm - Rev. B 4/08 EN
Example: Meeting
READ bursts are initiated with a READ command, as shown in Figure 10. The starting
column and bank addresses are provided with the READ command, and auto precharge
is either enabled or disabled for that burst access. If auto precharge is enabled, the row
being accessed is precharged at the completion of the burst. For the generic READ
commands used in the following illustrations, auto precharge is disabled.
During READ bursts, the valid data-out element from the starting column address is
available following the CL after the READ command. Each subsequent data-out element
will be valid by the next positive clock edge. Figure 18 on page 43 shows general timing
for each possible CL setting.
Upon completion of a burst, assuming no other commands have been initiated, the DQs
will go High-Z. A continuous page burst continues until terminated. At the end of the
page, it wraps to column 0 and continues.
Data from any READ burst may be truncated with a subsequent READ command, and
data from a fixed-length READ burst may be immediately followed by data from a READ
command. In either case, a continuous flow of data can be maintained. The first data
element from the new burst either follows the last element of a completed burst or the
last desired data element of a longer burst that is being truncated. The new READ
command should be issued x cycles before the clock edge at which the last desired data
element is valid, where x = CL - 1. This is shown in Figure 19 on page 44 for CAS latencies
of two and three.
Mobile SDRAMs use a pipelined architecture and therefore do not require the 2n rule
associated with a prefetch architecture. A READ command can be initiated on any clock
cycle following a previous READ command. Full-speed random read accesses can be
performed to the same bank, as shown in Figure 18 on page 43, or each subsequent
READ may be performed to a different bank.
Command
CLK
t
RCD (MIN) When 2 <
ACTIVE
T0
t CK
t
NOP
RCD (MIN)
T1
42
t CK
t
RCD (MIN)/
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T2
t CK
t
CK < 3
READ or
WRITE
Don’t Care
T3
©2007 Micron Technology, Inc. All rights reserved.
SDR Mobile SDRAM
Operations