mt48h16m32lfcm-75-it Micron Semiconductor Products, mt48h16m32lfcm-75-it Datasheet - Page 70

• Manufacturer Part Number: mt48h16m32lfcm-75-it
• Description: 512mb 32 Meg X 16, 16 Meg X 32 Mobile Sdram Features
• Manufacturer: Micron Semiconductor Products

Figure 50:
Deep Power-Down
PDF: 09005aef82ea3742/Source: 09005aef82ea3752
sdr_mobile_sdram_cmd_op_timing_dia_fr4.08__4.fm - Rev. B 4/08 EN
Command
Precharge all
BA0, BA1
active banks
Address
DQM
CKE
CLK
A10
DQ
High-Z
t CMS
t CKS
Power-Down Mode
t AS
SINGLE BANK
PRECHARGE
ALL BANKS
Bank(s)
T0
Notes:
t CMH
t CKH
t AH
Two clock cycles
All banks idle, enter
power-down mode
power-down deactivates the input and output buffers, excluding CKE, for maximum
power savings while in standby. The device may not remain in the power-down state
longer than the refresh period (64ms) since no REFRESH operations are performed in
this mode.
The power-down state is exited by registering a NOP or COMMAND INHIBIT and CKE
HIGH at the desired clock edge (meeting
1. Violating refresh requirements during power-down may result in a loss of data.
Deep power-down mode is a maximum power-saving feature achieved by shutting off
the power to the entire memory array of the device. Data on the memory array will not
be retained after deep power-down mode is executed. Deep power-down mode is
entered by having all banks idle then CS# and WE# held LOW with RAS# and CAS# HIGH
at the rising edge of the clock, while CKE is LOW. CKE must be held LOW during deep
power-down.
t CK
T1
NOP
t CKS
t CL
T2
NOP
Input buffers gated off while in
power-down mode
t CH
70
Exit power-down mode
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
CKS) (see Figure 50 on page 70).
t CKS
Tn + 1
NOP
All banks idle
©2007 Micron Technology, Inc. All rights reserved.
SDR Mobile SDRAM
Tn + 2
ACTIVE
Row
Row
Bank
Don’t Care
Operations