mt47h64m16hw-3 Micron Semiconductor Products, mt47h64m16hw-3 Datasheet - Page 27

• Manufacturer Part Number: mt47h64m16hw-3
• Description: 1gb X4, X8, X16 Ddr2 Sdram
• Manufacturer: Micron Semiconductor Products

Table 11:
PDF: 09005aef821ae8bf/Source: 09005aef821aed36
1Gb_DDR2_x4x8x16_D2.fm - 1Gb DDR2: Rev. N; Core DDR2: Rev. C 4/08 EN
Parameter/Condition
Operating one bank active-precharge current:
t
t
between valid commands; address bus inputs are
switching; Data bus inputs are switching
Operating one bank active-read-precharge
current: I
t
t
HIGH, CS# is HIGH between valid commands;
address bus inputs are switching; Data pattern is
same as I
Precharge power-down current: All banks idle;
t
address bus inputs are stable; Data bus inputs are
floating
Precharge quiet standby current: All banks idle;
t
control and address bus inputs are stable; Data bus
inputs are floating
Precharge standby current: All banks idle;
t
control and address bus inputs are switching; Data
bus inputs are switching
Active power-down current: All banks open;
t
address bus inputs are stable; Data bus inputs are
floating
Active standby current: All banks open;
t
(I
commands; Other control and address bus inputs
are switching; Data bus inputs are switching
Operating burst write current: All banks open,
continuous burst writes; BL = 4, CL = CL (I
t
(I
commands; address bus inputs are switching; Data
bus inputs are switching
Operating burst read current: All banks open,
continuous burst reads, I
CL = CL (I
t
CS# is HIGH between valid commands; address bus
inputs are switching; Data bus inputs are switching
Burst refresh current:
command at every
CS# is HIGH between valid commands; Other
control and address bus inputs are switching; Data
bus inputs are switching
CK =
RAS =
CK =
RAS =
CK =
CK =
CK =
CK =
CK =
CK =
RAS =
DD
DD
); CKE is HIGH, CS# is HIGH between valid
); CKE is HIGH, CS# is HIGH between valid
t
t
t
t
t
t
t
t
CK (I
CK (I
CK (I
CK (I
CK (I
CK (I
CK (I
CK (I
t
t
t
RAS MIN (I
RAS MIN (I
RAS MAX (I
DD
DD
OUT
DD
DD
DD
DD
DD
DD
DD
DD
4W
), AL = 0;
DDR2 I
Notes: 1–7 (page 30) apply to the entire table
),
),
); CKE is LOW; Other control and
); CKE is HIGH, CS# is HIGH; Other
); CKE is HIGH, CS# is HIGH; Other
); CKE is LOW; Other control and
),
),
= 0mA; BL = 4, CL = CL (I
t
t
t
t
RC =
RC =
RAS =
RAS =
DD
DD
DD
t
RFC (I
); CKE is HIGH, CS# is HIGH
),
t
t
t
),
CK =
DD
RC (I
RC (I
t
t
t
RAS MAX (I
RAS MAX (I
RCD =
t
RP =
t
OUT
CK =
DD
Specifications and Conditions (Die Revision A)
DD
DD
t
CK (I
) interval; CKE is HIGH,
= 0mA; BL = 4,
),
),
t
RP (I
t
t
RCD (I
CK (I
DD
DD
DD
DD
),
DD
DD
); CKE is HIGH,
),
),
); REFRESH
DD
t
t
); CKE is
RP =
RP =
DD
), AL = 0;
), AL = 0;
t
t
RP
RP
Symbol Configuration
I
I
I
I
I
I
I
DD
DD
DD
DD
I
I
DD
DD
DD
I
DD
DD
DD
4W
2Q
2N
3N
2P
3P
4R
0
1
5
27
Electrical Specifications – I
Slow PDN exit
Fast PDN exit
x4, x8, x16
MR12 = 0
MR12 = 1
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
Micron Technology, Inc., reserves the right to change products or specifications without notice.
x16
x16
x16
x16
x16
x16
x16
x16
1Gb: x4, x8, x16 DDR2 SDRAM
-25E/
100
150
110
175
185
315
190
320
280
280
-25
65
70
75
75
80
50
18
85
7
-3E/-3
135
100
160
160
210
160
220
270
270
90
55
65
60
70
45
18
70
75
7
©2004 Micron Technology, Inc. All rights reserved.
-37E
110
130
140
180
145
180
250
250
80
95
41
45
45
50
40
18
60
60
7
DD
Parameters
110
125
110
160
110
160
220
240
-5E
70
80
35
40
40
40
35
18
45
55
7
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA