mt47h64m16hw-3 Micron Semiconductor Products, mt47h64m16hw-3 Datasheet - Page 99

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mt47h64m16hw-3

Manufacturer Part Number
mt47h64m16hw-3
Description
1gb X4, X8, X16 Ddr2 Sdram
Manufacturer
Micron Semiconductor Products
Datasheet

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Figure 59:
PDF: 09005aef8117c187/Source: 09005aef821aed36
DDR2_x4x8x16_Core2.fm - 1Gb DDR2: Rev. N; Core DDR2: Rev. C 4/08 EN
WRITE Burst
Notes:
1. Subsequent rising DQS signals must align to the clock within
2. DI b = data-in for column b.
3. Three subsequent elements of data-in are applied in the programmed order following DI b.
4. Shown with BL = 4, AL = 0, CL = 3; thus, WL = 2.
5. A10 is LOW with the WRITE command (auto precharge is disabled).
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
DQS, DQS#
DQS, DQS#
DQS, DQS#
Command
Address
CK#
DM
DM
DM
DQ
DQ
DQ
CK
Bank a,
WRITE
Col b
T0
WL ± t DQSS
WL - t DQSS
WL + t DQSS
99
NOP
T1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DI
b
NOP
T2
DI
b
DI
b
1Gb: x4, x8, x16 DDR2 SDRAM
Transitioning Data
T2n
t DQSS 5
T3
NOP
5
t DQSS 5
t
DQSS.
©2003 Micron Technology, Inc. All rights reserved.
T3n
NOP
T4
Don’t Care
Operations

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