pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 269
pnx1700
Manufacturer Part Number
pnx1700
Description
Connected Media Processor
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1700.pdf
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Philips Semiconductors
Volume 1 of 1
Table 10: PCI Configuration Registers
PNX17XX_SER_1
Preliminary data sheet
Bit
2:0
Offset 0x0018
This aperture is for the XIO on the PNX17xx Series, which supports up to 128 MB of XIO memory space.
31:28
27:21
20:4
3
2:0
Offset 0x002C
The values used in this register will be loaded into the register before entertaining any transactions on the PCI bus. The boot
loader will initialize control register address 0x006C with the correct values.
31:16
15:0
Offset 0x0030
Offset 0x0034
31:8
7:0
Offset 0x003C
31:24
23:16
15:8
7:0
Symbol
Type
Base18 Address
Base18 Address
Reserved
Prefetchable
Memory
Subsystem ID
Subsystem Vendor ID
Reserved
cap_pointer
max_lat
min_gnt
interrupt_pin
interrupt_line
Base18 Address Register
Subsystem ID/Subsystem Vendor ID
Reserved
Capabilities Pointer
Max_Lat, Min_Gnt, Interrupt pin, Interrupt Line
Acces
s
R
R/W
R/W*
R
R
R
R
R
R
R
R/W1
R/W1
R
R/W
Value
0
0001
1100000
0
cfg*
0
0
0
0
0x40
0x18
0x09
0x01
0x00
Rev. 1 — 17 March 2006
Description
Indicates type 0 memory space (locatable anywhere in 32-bit
address space).
Upper 18 bits of base address of the first memory or IO aperture
*The base 18 can be configured to various aperture sizes from 2
MB to 256 MB. (See pci_setup register). Depending on aperture
size selected, various bits will be R/W or Read Only.
Bit:
256M: RO
128M: RW
64M:
32M:
16M:
8M:
4M:
2M:
RO = Read-only bits read back as zero.
Prefetchable if configured as 1.
*Value is determined by pci_setup register.
This bit indicates type 0 memory aperture.
Subsystem ID. The value for this field is provided by Philips PCI SIG
representative for Philips internal customers. External customers
will provide their own number.
Subsystem Vendor ID. The value for this field is 1131 for Philips
internal customers. External customers need to apply to the PCI
SIG to obtain a value if they do not have one already.
Indicates extended capabilities are present starting at 40.
Indicates the max latency tolerated in 1/4 microsecond for PCI
master. This value may be changed if written to before the pci_setup
register.
Indicates how long the PCI master will need to use the bus. This
value may be changed if written to before the pci_setup register.
Indicates which interrupt pin is used.
Interrupt routing information
27
RW
RW
RW
RW
RW
RW
26
RO
RO
RW
RW
RW
RW
RW
RW
25
RO
RO
RO
RW
RW
RW
RW
RW
24
RO
RO
RO
RO
RW
RW
RW
RW
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
23
RO
RO
RO
RO
RO
RW
RW
RW
Chapter 7: PCI-XIO Module
PNX17xx Series
22
RO
RO
RO
RO
RO
RO
RW
RW
21
RO
RO
RO
RO
RO
RO
RO
RW
7-48
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