pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 732

• Manufacturer Part Number: pnx1700
• Description: Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
5.10.1 Overview
5.10.2 Receive Flow Control
5.10.3 Transmit Flow Control
5.10 IEEE 802.3/Clause 31 Flow Control
For full-duplex connections, the LAN100 supports IEEE 802.3/clause 31 flow control
using pause frames. This type of flow control may be used in full-duplex point-to-point
connections. Flow control allows a receiver to stall a transmitter, for example, when
the receive buffers are (almost) full. For this purpose the receiving side sends a
pause frame to the transmitting side.
Pause frames use units of 512 bit-slot times, corresponding to 128 times the ratio of
receive clock to transmit clock cycles.
In full-duplex mode the LAN100 will suspend its transmissions when it receives a
pause control frame. Receive flow control is initiated by the receiving side of the
LAN100. It is enabled using the MAC1 configuration register by setting the RX_
FLOW_CONTROL bit to 1. If the RX_FLOW_CONTROL bit is zero, then the LAN100
ignores received pause control frames. When a pause frame is received on the Rx
side of the LAN100, transmission on the Tx side will be interrupted after the currently
transmitting frame has completed for an amount of time as indicated in the received
pause frame. The Transmit Datapath of the LAN100 will stop transmitting data for the
number of 512-bit slot times encoded in the pause-timer field of the received pause
control frame.
By default, the received pause control frames are not forwarded to the device driver.
To forward the received flow-control frames to the device driver, set the PASS_ALL_
RECEIVE_FRAMES bit in the MAC1 configuration register.
If device drivers need to stall the receive data, for example, because software buffers
are full, the LAN100 can transmit pause control frames. Transmit flow control must be
initiated by the device driver software; there is no IEEE 802.3/31 flow control initiated
by the hardware, such as the DMA managers.
With software flow control, the device driver can detect when the process of receiving
packets must be interrupted by sending out Tx pause frames. Note that due to
Ethernet delays, a few packets can still be received before the flow control takes
effect and the receive stream stops.
Transmit flow control is activated by writing 1 to the TxFlowControl bit of the
Command register. When the Ethernet module operates in full-duplex mode, this will
result in transmission of IEEE 802.3/31 pause frames. The flow control continues until
a 0 is written to TxFlowControl bit of the Command register.
If the MAC is operating in full-duplex mode, then setting the TxFlowControl bit of the
Command register will start a pause-frame transmission. The value inserted into the
pause-timer value field of transmitted pause frames is programmed via the
PauseTimer[15:0] bits in the FlowControlCounter register. When the TxFlowControl
bit is deasserted, another pause frame having a pause-timer value of 0x0000 is
automatically sent to abort flow control and resume transmission.
Rev. 1 — 17 March 2006
Chapter 23: LAN100 — Ethernet Media Access Controller
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
23-59